cvw/wally-pipelined/src/privileged
2021-07-05 23:42:58 -04:00
..
csr.sv Added support for TVM flag in CSRS and to disabl TLB when MEM_VIRTMEM = 0 2021-07-05 20:35:31 -04:00
csrc.sv Gave names to for loops in generate blocks for ease of reference 2021-07-04 18:52:16 -04:00
csri.sv Gave names to for loops in generate blocks for ease of reference 2021-07-04 18:52:16 -04:00
csrm.sv Added support for PMP lock bits in csrm and repartitioned design to pass around 8-bit PMPCFG entries 2021-07-04 11:39:59 -04:00
csrn.sv Gave names to for loops in generate blocks for ease of reference 2021-07-04 18:52:16 -04:00
csrs.sv Added support for TVM flag in CSRS and to disabl TLB when MEM_VIRTMEM = 0 2021-07-05 20:35:31 -04:00
csrsr.sv Fixed adrdecs to use Access signals for TIMs 2021-07-05 23:42:58 -04:00
csru.sv Gave names to for loops in generate blocks for ease of reference 2021-07-04 18:52:16 -04:00
privdec.sv Added support for PMP lock bits in csrm and repartitioned design to pass around 8-bit PMPCFG entries 2021-07-04 11:39:59 -04:00
privileged.sv Fixed MPRV and MXR checks in TLB 2021-07-04 13:20:29 -04:00
trap.sv mcause test fixes and s-mode interrupt bugfix 2021-06-16 17:37:08 -04:00