cvw/pipelined/src/generic/flop
Ross Thompson 3b07584403 Updated the names of the *WriteDataM inside the LSU to more meaningful names.
Moved the FWriteDataMux so that the bus and dtim both get fpu stores.
Modified the PMA to disallow double sized reads when XLEN=32.
2022-08-23 10:34:39 -05:00
..
bram1p1rw.sv Removed big64.txt reference, fixing a warning 2022-06-23 14:39:53 -07:00
bram2p1r1w.sv Cleaned bram interface 2022-06-08 01:39:44 +00:00
flop.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
flopen.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
flopenl.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
flopenr.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
flopenrc.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
flopens.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
flopr.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
floprc.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
simpleram.sv Updated the names of the *WriteDataM inside the LSU to more meaningful names. 2022-08-23 10:34:39 -05:00
synchronizer.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00