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			236 lines
		
	
	
		
			6.3 KiB
		
	
	
	
		
			Python
		
	
	
		
			Executable File
		
	
	
	
	
			
		
		
	
	
			236 lines
		
	
	
		
			6.3 KiB
		
	
	
	
		
			Python
		
	
	
		
			Executable File
		
	
	
	
	
| #!/usr/bin/env python3
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| ##################################
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| # testgen-CAUSE.py
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| #
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| # dottolia@hmc.edu 1 Mar 2021
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| #
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| # Generate directed and random test vectors for RISC-V Design Validation.
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| ##################################
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| 
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| ##################################
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| # libraries
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| ##################################
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| from datetime import datetime
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| from random import randint 
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| from random import seed
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| from random import getrandbits
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| 
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| ##################################
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| # functions
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| ##################################
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| 
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| #For instruction-fetch access or page-fault exceptions on systems with variable-length instructions, mtval will contain the virtual address of the portion of the instruction that caused the fault while mepc will point to the beginning of the instruction.
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| 
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| def randRegs():
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|   reg1 = randint(1,20)
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|   reg2 = randint(1,20)
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|   reg3 = randint(1,20)
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|   if (reg1 == 6 or reg2 == 6 or reg3 == 6 or reg1 == reg2):
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|     return randRegs()
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|   else:
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|       return str(reg1), str(reg2), str(reg3)
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| 
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| def writeVectors(a, storecmd):
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|   writeSingleVector(a, storecmd, f"""csrrw x0, {test}, x13""")
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|   writeSingleVector(a, storecmd, f"""csrrwi x0, {test}, {a % 32}""")
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|   if a != 0:
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|     writeSingleVector(a, storecmd, f"""csrrs x0, {test}, x13""")
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|     writeSingleVector(a, storecmd, f"""csrrc x0, {test}, x13""")
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|     writeSingleVector(a, storecmd, f"""csrrsi x0, {test}, {(a % 31) + 1}""")
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|     writeSingleVector(a, storecmd, f"""csrrci x0, {test}, {(a % 31) + 1}""")
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| 
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| 
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| def writeSingleVector(a, storecmd, writeInstruction):
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|   global testnum
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| 
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|   # Illegal Instruction 
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|   writeTest(storecmd, f, r, f"""
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|     li x13, MASK_XLEN({a})
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|     csrrw x11, {test}, x0
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|     {writeInstruction}
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|     csrrwi x12, {test}, 0
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|     sub x15, x11, x12
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|   """, False, 2)
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|   
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|   expected = 0
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|   lines = ""
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|   lines += storecmd + " x15, " + str(wordsize*testnum) + "(x6)\n"
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|   #lines += "RVTEST_IO_ASSERT_GPR_EQ(x7, " + str(reg2) +", "+formatstr.format(expected)+")\n"
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|   f.write(lines)
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|   if (xlen == 32):
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|     line = formatrefstr.format(expected)+"\n"
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|   else:
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|     line = formatrefstr.format(expected % 2**32)+"\n" + formatrefstr.format(expected >> 32) + "\n"
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|   r.write(line)
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|   testnum = testnum+1
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| 
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|   
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| 
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| def writeTest(storecmd, f, r, test, interrupt, code, mode = "m", resetHander = ""):
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|   global testnum
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| 
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|   expected = code
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|   if(interrupt):
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|     expected+=(1 << (wordsize - 1))
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| 
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| 
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|   trapEnd = ""
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|   before = ""
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|   if mode != "m":
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|     before = f"""
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|       li x1, 0b110000000000
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|       csrrc x28, mstatus, x1
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|       li x1, 0b{"01" if mode == "s" else "00"}0000000000
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|       csrrs x28, mstatus, x1
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| 
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|       auipc x1, 0
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|       addi x1, x1, 16 # x1 is now right after the mret instruction
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|       csrrw x27, mepc, x1
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|       mret
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| 
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|       # We're now in {mode} mode...
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|     """
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| 
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|     trapEnd = f"""j _jend{testnum}"""
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| 
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| 
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|   # Setup
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|   # TODO: Adding 8 to x30 won't work for 32 bit?
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|   # x31: Old mtvec value
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|   # x30: trap handler address
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|   # x29: Old mtvec value for user/supervisor mode
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|   # x28: Old mstatus value
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|   # x27: Old mepc value
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|   # x26: 0 if we should execute mret normally. 1 otherwise. This allows us to stay in machine
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|   # x25: mcause
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|   # mode for the next tests
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|   lines = f"""
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|     # Testcase {testnum}
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|     csrrs x31, mtvec, x0
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| 
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|     auipc x30, 0
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|     addi x30, x30, 12
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|     j _jtest{testnum}
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| 
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|     # Machine trap vector
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|     {resetHander}
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|     csrrs x25, mcause, x0
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|     csrrs x1, mepc, x0
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|     addi x1, x1, 4
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|     csrrw x0, mepc, x1
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|     {trapEnd}
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|     mret
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| 
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|     # Actual test
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|     _jtest{testnum}:
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|     csrrw x0, mtvec, x30
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| 
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|     # Start test code
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|     li x25, 0x7BAD
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|     {before}
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|     {test}
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| 
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|     # Finished test. Reset to old mtvec
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|     _jend{testnum}:
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| 
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|     csrrw x0, mtvec, x31
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|   """
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| 
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|   #expected = 42
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|   
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|   lines += storecmd + " x25, " + str(wordsize*testnum) + "(x6)\n"
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|   #lines += "RVTEST_IO_ASSERT_GPR_EQ(x7, " + str(reg2) +", "+formatstr.format(expected)+")\n"
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|   f.write(lines)
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|   if (xlen == 32):
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|     line = formatrefstr.format(expected)+"\n"
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|   else:
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|     line = formatrefstr.format(expected % 2**32)+"\n" + formatrefstr.format(expected >> 32) + "\n"
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|   r.write(line)
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|   testnum = testnum+1
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| 
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|   # lines += storecmd + " x0" + ", " + str(wordsize*testnum) + "(x6)\n"
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|   # #lines += "RVTEST_IO_ASSERT_GPR_EQ(x7, " + str(reg2) +", "+formatstr.format(expected)+")\n"
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|   # f.write(lines)
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|   # if (xlen == 32):
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|   #   line = formatrefstr.format(expected)+"\n"
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|   # else:
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|   #   line = formatrefstr.format(expected % 2**32)+"\n" + formatrefstr.format(expected >> 32) + "\n"
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|   # r.write(line)
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|   # testnum = testnum+1
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| 
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| ##################################
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| # main body
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| ##################################
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| 
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| # change these to suite your tests
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| # csrrw, csrrs, csrrc, csrrwi, csrrsi, csrrci
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| author = "dottolia@hmc.edu"
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| xlens = [32, 64]
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| numrand = 4;
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| tests = ["marchid", "mhartid", "mimpid", "mvendorid"]
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| 
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| # setup
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| seed(0xD365DDEB9173AB42) # make tests reproducible
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| 
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| # generate files for each test
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| for xlen in xlens:
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|   formatstrlen = str(int(xlen/4))
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|   formatstr = "0x{:0" + formatstrlen + "x}" # format as xlen-bit hexadecimal number
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|   formatrefstr = "{:08x}" # format as xlen-bit hexadecimal number with no leading 0x
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|   if (xlen == 32):
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|     storecmd = "sw"
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|     wordsize = 4
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|   else:
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|     storecmd = "sd"
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|     wordsize = 8
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| 
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|   for test in tests:
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|     corners = [
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|       0, 1, 2, 31, 32,
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|       0x624B3E976C52DD14 % 2**xlen, 2**(xlen-1)-2, 2**(xlen-1)-1, 
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|       2**(xlen-1), 2**(xlen-1)+1, 0xC365DDEB9173AB42 % 2**xlen, 2**(xlen)-2, 2**(xlen)-1
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|     ]
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|     imperaspath = "../../../imperas-riscv-tests/riscv-test-suite/rv" + str(xlen) + "p/"
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|     basename = "WALLY-" + test.upper()
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|     fname = imperaspath + "src/" + basename + ".S"
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|     refname = imperaspath + "references/" + basename + ".reference_output"
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|     testnum = 0
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| 
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|     # print custom header part
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|     f = open(fname, "w")
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|     r = open(refname, "w")
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|     line = "///////////////////////////////////////////\n"
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|     f.write(line)
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|     lines="// "+fname+ "\n// " + author + "\n"
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|     f.write(lines)
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|     line ="// Created " + str(datetime.now()) 
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|     f.write(line)
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| 
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|     # insert generic header
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|     h = open("../testgen_header.S", "r")
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|     for line in h:  
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|       f.write(line)
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| 
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|     # print directed and random test vectors
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|     for i in corners:
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|       writeVectors(i, storecmd)
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|     for i in range(0,numrand):
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|       writeVectors(getrandbits(xlen), storecmd)
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| 
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| 
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|     # print footer
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|     h = open("../testgen_footer.S", "r")
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|     for line in h:  
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|       f.write(line)
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| 
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|     # Finish
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|     lines = ".fill " + str(testnum) + ", " + str(wordsize) + ", -1\n"
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|     lines = lines + "\nRV_COMPLIANCE_DATA_END\n" 
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|     f.write(lines)
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|     f.close()
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|     r.close()
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| 
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| 
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| 
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| 
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