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Configurable RISC-V Processor
1,239 Commits 5 Branches 2 Tags 53 MiB
SystemVerilog 33.7%
Python 19.2%
Assembly 17.5%
Tcl 16.2%
C 5.8%
Other 7.4%
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David Harris 39bd7e7edc Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-07-09 07:53:30 -04:00
riscv-coremark
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wally-pipelined Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-07-09 07:53:30 -04:00
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.gitignore organize linux-testgen folder, add readme to describe Buildroot process, add Buildroot config source files 2021-07-08 19:18:11 -04:00
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README.md

README.md

riscv-wally

Configurable RISC-V Processor