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cvw/fpga/generator/debug
History
Rose Thompson 6c9c1fc841 Added new tsm for debuggin the plic.
2024-12-03 15:28:39 -06:00
..
dcache-miss-evict-dirty-deadlock.tsm Setup to run with both the vcu108 and vcu118 boards. Set the parameters in the Makefile. 2022-10-24 15:38:39 -05:00
load-deadlock.tsm Setup to run with both the vcu108 and vcu118 boards. Set the parameters in the Makefile. 2022-10-24 15:38:39 -05:00
miss-fetch-deadlock.tsm Setup to run with both the vcu108 and vcu118 boards. Set the parameters in the Makefile. 2022-10-24 15:38:39 -05:00
plic.tsm Added new tsm for debuggin the plic. 2024-12-03 15:28:39 -06:00
trigger.tsm Setup to run with both the vcu108 and vcu118 boards. Set the parameters in the Makefile. 2022-10-24 15:38:39 -05:00
uart-stuck.tsm Setup to run with both the vcu108 and vcu118 boards. Set the parameters in the Makefile. 2022-10-24 15:38:39 -05:00