cvw/Makefile
2024-11-25 08:12:52 -08:00

46 lines
1.0 KiB
Makefile

# David_Harris@hmc.edu 2023
# Top-level Makefile for CORE-V-Wally
# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
MAKEFLAGS += --output-sync --no-print-directory
SIM = ${WALLY}/sim
.PHONY: all riscof testfloat combined_IF_vectors zsbl benchmarks coremark embench coverage cvw-arch-verif clean
all: riscof testfloat combined_IF_vectors zsbl coverage cvw-arch-verif # benchmarks
# riscof builds the riscv-arch-test and wally-riscv-arch-test suites
riscof:
$(MAKE) -C sim
testfloat:
$(MAKE) -C ${WALLY}/tests/fp vectors
combined_IF_vectors: testfloat riscof
$(MAKE) -C ${WALLY}/tests/fp combined_IF_vectors
zsbl:
$(MAKE) -C ${WALLY}/fpga/zsbl
benchmarks:
$(MAKE) coremark
$(MAKE) embench
coremark:
cd ${WALLY}/benchmarks/coremark; $(MAKE); $(MAKE) run
embench:
cd ${WALLY}/benchmarks/embench; $(MAKE); $(MAKE) run
coverage:
$(MAKE) -C tests/coverage
cvw-arch-verif:
$(MAKE) -C ${WALLY}/addins/cvw-arch-verif
clean:
$(MAKE) clean -C sim
$(MAKE) clean -C ${WALLY}/tests/fp
$(MAKE) clean -C ${WALLY}/addins/cvw-arch-verif