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90 lines
4.5 KiB
Systemverilog
90 lines
4.5 KiB
Systemverilog
///////////////////////////////////////////
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// privdec.sv
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//
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// Written: David_Harris@hmc.edu 9 January 2021
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// Modified:
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//
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// Purpose: Decode Privileged & related instructions
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// See RISC-V Privileged Mode Specification 20190608 3.1.10-11
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//
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// Documentation: RISC-V System on Chip Design Chapter 5
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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//
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// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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`include "wally-config.vh"
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module privdec (
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input logic clk, reset,
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input logic StallM,
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input logic [31:20] InstrM, // privileged instruction function field
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input logic PrivilegedM, // is this a privileged instruction (from IEU controller)
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input logic IllegalIEUFPUInstrM, // Not a legal IEU instruction
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input logic IllegalCSRAccessM, // Not a legal CSR access
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input logic [1:0] PrivilegeModeW, // current privilege level
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input logic STATUS_TSR, STATUS_TVM, STATUS_TW, // status bits
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output logic IllegalInstrFaultM, // Illegal instruction
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output logic EcallFaultM, BreakpointFaultM, // Ecall or breakpoint; must retire, so don't flush it when the trap occurs
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output logic sretM, mretM, // return instructions
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output logic wfiM, sfencevmaM // wfi / sfence.fma instructions
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);
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logic IllegalPrivilegedInstrM; // privileged instruction isn't a legal one or in legal mode
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logic WFITimeoutM; // WFI reaches timeout threshold
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logic ebreakM, ecallM; // ebreak / ecall instructions
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///////////////////////////////////////////
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// Decode privileged instructions
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///////////////////////////////////////////
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assign sretM = PrivilegedM & (InstrM[31:20] == 12'b000100000010) & `S_SUPPORTED &
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(PrivilegeModeW == `M_MODE | PrivilegeModeW == `S_MODE & ~STATUS_TSR);
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assign mretM = PrivilegedM & (InstrM[31:20] == 12'b001100000010) & (PrivilegeModeW == `M_MODE);
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assign ecallM = PrivilegedM & (InstrM[31:20] == 12'b000000000000);
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assign ebreakM = PrivilegedM & (InstrM[31:20] == 12'b000000000001);
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assign wfiM = PrivilegedM & (InstrM[31:20] == 12'b000100000101);
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assign sfencevmaM = PrivilegedM & (InstrM[31:25] == 7'b0001001) &
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(PrivilegeModeW == `M_MODE | (PrivilegeModeW == `S_MODE & ~STATUS_TVM));
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///////////////////////////////////////////
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// WFI timeout Privileged Spec 3.1.6.5
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///////////////////////////////////////////
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if (`U_SUPPORTED) begin:wfi
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logic [`WFI_TIMEOUT_BIT:0] WFICount, WFICountPlus1;
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assign WFICountPlus1 = WFICount + 1;
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floprc #(`WFI_TIMEOUT_BIT+1) wficountreg(clk, reset, ~wfiM, WFICountPlus1, WFICount); // count while in WFI
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assign WFITimeoutM = ((STATUS_TW & PrivilegeModeW != `M_MODE) | (`S_SUPPORTED & PrivilegeModeW == `U_MODE)) & WFICount[`WFI_TIMEOUT_BIT];
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end else assign WFITimeoutM = 0;
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///////////////////////////////////////////
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// Extract exceptions by name and handle them
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///////////////////////////////////////////
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assign BreakpointFaultM = ebreakM; // could have other causes from a debugger
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assign EcallFaultM = ecallM;
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///////////////////////////////////////////
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// Fault on illegal instructions
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///////////////////////////////////////////
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assign IllegalPrivilegedInstrM = PrivilegedM & ~(sretM|mretM|ecallM|ebreakM|wfiM|sfencevmaM);
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assign IllegalInstrFaultM = IllegalIEUFPUInstrM | IllegalPrivilegedInstrM | IllegalCSRAccessM |
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WFITimeoutM;
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endmodule
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