mirror of
https://github.com/openhwgroup/cvw
synced 2025-01-23 21:14:37 +00:00
202 lines
6.3 KiB
Systemverilog
202 lines
6.3 KiB
Systemverilog
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// Populate parameter structure with values specific to the current configuration
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`include "BranchPredictorType.vh"
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localparam cvw_t P = '{
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XLEN : XLEN,
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IEEE754 : IEEE754,
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MISA : MISA,
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AHBW : AHBW,
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RAM_LATENCY : RAM_LATENCY,
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BURST_EN : BURST_EN,
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ZICSR_SUPPORTED : ZICSR_SUPPORTED,
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ZIFENCEI_SUPPORTED : ZIFENCEI_SUPPORTED,
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COUNTERS : COUNTERS,
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ZICNTR_SUPPORTED : ZICNTR_SUPPORTED,
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ZIHPM_SUPPORTED : ZIHPM_SUPPORTED,
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ZFH_SUPPORTED : ZFH_SUPPORTED,
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ZFA_SUPPORTED : ZFA_SUPPORTED,
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SSTC_SUPPORTED : SSTC_SUPPORTED,
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VIRTMEM_SUPPORTED : VIRTMEM_SUPPORTED,
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VECTORED_INTERRUPTS_SUPPORTED : VECTORED_INTERRUPTS_SUPPORTED,
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BIGENDIAN_SUPPORTED : BIGENDIAN_SUPPORTED,
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SVADU_SUPPORTED : SVADU_SUPPORTED,
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ZMMUL_SUPPORTED : ZMMUL_SUPPORTED,
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ZICBOM_SUPPORTED : ZICBOM_SUPPORTED,
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ZICBOZ_SUPPORTED : ZICBOZ_SUPPORTED,
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ZICBOP_SUPPORTED : ZICBOP_SUPPORTED,
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ZICCLSM_SUPPORTED : ZICCLSM_SUPPORTED,
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ZICOND_SUPPORTED : ZICOND_SUPPORTED,
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SVPBMT_SUPPORTED : SVPBMT_SUPPORTED,
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SVNAPOT_SUPPORTED : SVNAPOT_SUPPORTED,
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SVINVAL_SUPPORTED : SVINVAL_SUPPORTED,
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ZAAMO_SUPPORTED : ZAAMO_SUPPORTED,
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ZALRSC_SUPPORTED : ZALRSC_SUPPORTED,
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BUS_SUPPORTED : BUS_SUPPORTED,
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DCACHE_SUPPORTED : DCACHE_SUPPORTED,
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ICACHE_SUPPORTED : ICACHE_SUPPORTED,
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ITLB_ENTRIES : ITLB_ENTRIES,
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DTLB_ENTRIES : DTLB_ENTRIES,
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DCACHE_NUMWAYS : DCACHE_NUMWAYS,
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DCACHE_WAYSIZEINBYTES : DCACHE_WAYSIZEINBYTES,
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DCACHE_LINELENINBITS : DCACHE_LINELENINBITS,
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ICACHE_NUMWAYS : ICACHE_NUMWAYS,
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ICACHE_WAYSIZEINBYTES : ICACHE_WAYSIZEINBYTES,
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ICACHE_LINELENINBITS : ICACHE_LINELENINBITS,
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CACHE_SRAMLEN : CACHE_SRAMLEN,
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IDIV_BITSPERCYCLE : IDIV_BITSPERCYCLE,
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IDIV_ON_FPU : IDIV_ON_FPU,
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PMP_ENTRIES : PMP_ENTRIES,
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RESET_VECTOR : RESET_VECTOR,
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WFI_TIMEOUT_BIT : WFI_TIMEOUT_BIT,
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DTIM_SUPPORTED : DTIM_SUPPORTED,
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DTIM_BASE : DTIM_BASE,
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DTIM_RANGE : DTIM_RANGE,
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IROM_SUPPORTED : IROM_SUPPORTED,
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IROM_BASE : IROM_BASE,
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IROM_RANGE : IROM_RANGE,
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BOOTROM_SUPPORTED : BOOTROM_SUPPORTED,
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BOOTROM_BASE : BOOTROM_BASE,
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BOOTROM_RANGE : BOOTROM_RANGE,
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BOOTROM_PRELOAD : BOOTROM_PRELOAD,
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UNCORE_RAM_SUPPORTED : UNCORE_RAM_SUPPORTED,
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UNCORE_RAM_BASE : UNCORE_RAM_BASE,
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UNCORE_RAM_RANGE : UNCORE_RAM_RANGE,
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UNCORE_RAM_PRELOAD : UNCORE_RAM_PRELOAD,
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EXT_MEM_SUPPORTED : EXT_MEM_SUPPORTED,
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EXT_MEM_BASE : EXT_MEM_BASE,
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EXT_MEM_RANGE : EXT_MEM_RANGE,
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CLINT_SUPPORTED : CLINT_SUPPORTED,
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CLINT_BASE : CLINT_BASE,
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CLINT_RANGE : CLINT_RANGE,
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GPIO_SUPPORTED : GPIO_SUPPORTED,
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GPIO_BASE : GPIO_BASE,
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GPIO_RANGE : GPIO_RANGE,
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UART_SUPPORTED : UART_SUPPORTED,
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UART_BASE : UART_BASE,
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UART_RANGE : UART_RANGE,
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PLIC_SUPPORTED : PLIC_SUPPORTED,
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PLIC_BASE : PLIC_BASE,
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PLIC_RANGE : PLIC_RANGE,
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SDC_SUPPORTED : SDC_SUPPORTED,
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SDC_BASE : SDC_BASE,
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SDC_RANGE : SDC_RANGE,
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SPI_SUPPORTED : SPI_SUPPORTED,
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SPI_BASE : SPI_BASE,
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SPI_RANGE : SPI_RANGE,
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GPIO_LOOPBACK_TEST : GPIO_LOOPBACK_TEST,
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SPI_LOOPBACK_TEST : SPI_LOOPBACK_TEST,
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UART_PRESCALE : UART_PRESCALE ,
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PLIC_NUM_SRC : PLIC_NUM_SRC,
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PLIC_NUM_SRC_LT_32 : PLIC_NUM_SRC_LT_32,
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PLIC_GPIO_ID : PLIC_GPIO_ID,
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PLIC_UART_ID : PLIC_UART_ID,
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PLIC_SPI_ID : PLIC_SPI_ID,
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PLIC_SDC_ID : PLIC_SDC_ID,
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BPRED_SUPPORTED : BPRED_SUPPORTED,
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BPRED_TYPE : BPRED_TYPE,
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BPRED_SIZE : BPRED_SIZE,
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BPRED_NUM_LHR : BPRED_NUM_LHR,
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BTB_SIZE : BTB_SIZE,
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RAS_SIZE : RAS_SIZE,
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INSTR_CLASS_PRED : INSTR_CLASS_PRED,
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RADIX : RADIX,
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DIVCOPIES : DIVCOPIES,
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ZBA_SUPPORTED : ZBA_SUPPORTED,
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ZBB_SUPPORTED : ZBB_SUPPORTED,
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ZBC_SUPPORTED : ZBC_SUPPORTED,
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ZBS_SUPPORTED : ZBS_SUPPORTED,
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ZCA_SUPPORTED : ZCA_SUPPORTED,
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ZCB_SUPPORTED : ZCB_SUPPORTED,
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ZCD_SUPPORTED : ZCD_SUPPORTED,
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ZCF_SUPPORTED : ZCF_SUPPORTED,
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ZBKB_SUPPORTED: ZBKB_SUPPORTED,
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ZBKC_SUPPORTED: ZBKC_SUPPORTED,
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ZBKX_SUPPORTED: ZBKX_SUPPORTED,
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ZKND_SUPPORTED: ZKND_SUPPORTED,
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ZKNE_SUPPORTED: ZKNE_SUPPORTED,
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ZKNH_SUPPORTED: ZKNH_SUPPORTED,
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ZKN_SUPPORTED : ZKN_SUPPORTED,
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USE_SRAM : USE_SRAM,
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M_MODE : M_MODE,
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S_MODE : S_MODE,
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U_MODE : U_MODE,
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VPN_SEGMENT_BITS : VPN_SEGMENT_BITS,
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VPN_BITS : VPN_BITS,
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PPN_BITS : PPN_BITS,
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PA_BITS : PA_BITS,
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SVMODE_BITS : SVMODE_BITS,
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ASID_BASE : ASID_BASE,
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ASID_BITS : ASID_BITS,
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NO_TRANSLATE : NO_TRANSLATE,
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SV32 : SV32,
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SV39 : SV39,
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SV48 : SV48,
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A_SUPPORTED : A_SUPPORTED,
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B_SUPPORTED : B_SUPPORTED,
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C_SUPPORTED : C_SUPPORTED,
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D_SUPPORTED : D_SUPPORTED,
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E_SUPPORTED : E_SUPPORTED,
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F_SUPPORTED : F_SUPPORTED,
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I_SUPPORTED : I_SUPPORTED,
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M_SUPPORTED : M_SUPPORTED,
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Q_SUPPORTED : Q_SUPPORTED,
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S_SUPPORTED : S_SUPPORTED,
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U_SUPPORTED : U_SUPPORTED,
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LOG_XLEN : LOG_XLEN,
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PMPCFG_ENTRIES : PMPCFG_ENTRIES,
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Q_LEN : Q_LEN,
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Q_NE : Q_NE,
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Q_NF : Q_NF,
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Q_BIAS : Q_BIAS,
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Q_FMT : Q_FMT,
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D_LEN : D_LEN,
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D_NE : D_NE,
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D_NF : D_NF,
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D_BIAS : D_BIAS,
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D_FMT : D_FMT,
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S_LEN : S_LEN,
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S_NE : S_NE,
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S_NF : S_NF,
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S_BIAS : S_BIAS,
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S_FMT : S_FMT,
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H_LEN : H_LEN,
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H_NE : H_NE,
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H_NF : H_NF,
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H_BIAS : H_BIAS,
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H_FMT : H_FMT,
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FLEN : FLEN,
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LOGFLEN : LOGFLEN,
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NE : NE ,
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NF : NF ,
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FMT : FMT ,
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BIAS : BIAS,
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FPSIZES : FPSIZES,
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FMTBITS : FMTBITS,
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LEN1 : LEN1 ,
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NE1 : NE1 ,
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NF1 : NF1 ,
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FMT1 : FMT1 ,
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BIAS1 : BIAS1,
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LEN2 : LEN2 ,
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NE2 : NE2 ,
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NF2 : NF2 ,
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FMT2 : FMT2 ,
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BIAS2 : BIAS2,
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CVTLEN : CVTLEN,
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LLEN : LLEN,
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LOGCVTLEN : LOGCVTLEN,
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FMALEN : FMALEN,
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NORMSHIFTSZ : NORMSHIFTSZ,
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LOGNORMSHIFTSZ : LOGNORMSHIFTSZ,
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LOGR : LOGR,
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RK : RK,
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FPDUR : FPDUR,
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DURLEN : DURLEN,
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DIVb : DIVb,
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DIVBLEN : DIVBLEN,
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INTDIVb : INTDIVb
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};
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