mirror of
https://github.com/openhwgroup/cvw
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19 lines
844 B
Plaintext
Executable File
19 lines
844 B
Plaintext
Executable File
# check for warnings in Verilog code
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# The verilator lint tool is faster and better than Modelsim so it is best to run this first.
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for config in rv64ic rv32ic; do
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echo "$config linting..."
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if !(verilator --lint-only "$@" --top-module wallypipelinedsoc "-Iconfig/$config" src/*/*.sv); then
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echo "Exiting after $config lint due to errors or warnings"
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exit 1
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fi
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done
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echo "All lints run with no errors or warnings"
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# --lint-only just runs lint rather than trying to compile and simulate
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# -I points to the include directory where files such as `include wally-config.vh are found
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# For more exhaustive (and sometimes spurious) warnings, run:
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# verilator --lint-only -Wall -Iconfig/rv64ic src/*
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# Unfortunately, this produces a bunch of UNUSED and UNDRIVEN signal warnings in blocks that are configured to not exist.
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