cvw/fpga/generator
2024-10-30 16:01:11 -05:00
..
debug
ahbaxibridge.tcl More updates to fpga IP module names. 2024-08-22 14:31:39 -07:00
clkconverter.tcl More updates to fpga IP module names. 2024-08-22 14:31:39 -07:00
ddr3-ArtyA7.tcl More updates to fpga IP module names. 2024-08-22 14:31:39 -07:00
ddr4-vcu108.tcl This actually fixes the vcu108 to correctly set the SPI clock frequency. 2024-09-03 13:11:03 -07:00
ddr4-vcu118.tcl Fixed bugs in the fpga Makefile and vcu118 ddr memory gen script. 2024-09-03 21:03:38 -07:00
insert_debug_comment.sh Maded insert_debug_comment.sh compatible with cygwin. 2024-04-22 10:48:34 -05:00
Makefile The path to the zsbl was wrong all this time, but for reason was working with older versions of Ubuntu, but one 24.04 it causes vivado to not find the rom and ram. 2024-10-30 16:01:11 -05:00
mmcm.tcl Finally worked out that subtle bug in the tcl scripts clock setting. 2024-09-03 10:30:34 -07:00
probe Update python shebangs to use /usr/bin/env python3 so virtual environment can be used (also aids in general portability) 2024-07-03 20:42:55 -07:00
sysrst.tcl More updates to fpga IP module names. 2024-08-22 14:31:39 -07:00
wally.tcl The path to the zsbl was wrong all this time, but for reason was working with older versions of Ubuntu, but one 24.04 it causes vivado to not find the rom and ram. 2024-10-30 16:01:11 -05:00
wave_config.wcfg remove hard-code path in wave_config.wcfg even though its probably not needed. Its a generated file. I believe the path doesn't matter, so I removed it. 2024-09-18 15:40:00 -05:00
xlnx_ddr3-artya7-mig.prj
xlnx_ddr4.tcl More updates to fpga IP module names. 2024-08-22 14:31:39 -07:00