Cedar Turek 21b2ea9666 fpu passing idiv tests on rv32gc 1 copy of radix 2!		2022-12-26 21:47:56 -08:00
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fdivsqrt	fpu passing idiv tests on rv32gc 1 copy of radix 2!	2022-12-26 21:47:56 -08:00
fma	reworked negitive sticky bit handeling in fma	2022-12-23 17:01:34 -06:00
postproc	Removed unused signals from FPU	2022-12-23 00:18:39 -08:00
fclassify.sv	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00
fcmp.sv	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00
fctrl.sv	Removed XEnE, YEnE, and ZEnE from forward logic.	2022-12-23 14:27:03 -06:00
fcvt.sv	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00
fhazard.sv	Removed XEnE, YEnE, and ZEnE from forward logic.	2022-12-23 14:27:03 -06:00
fpu.sv	Removed unused DivSE from FPU	2022-12-26 07:29:19 -08:00
fregfile.sv	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00
fsgninj.sv	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00
normshift.sv	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00
unpack.sv	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00
unpackinput.sv	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00