cvw/sim
Rose Thompson 1ded4a972f This is a better solution. It's closer to the original book HPTW FSM,
but is slightly more complex in RTL.  Instead it looks at ReadDataM
for the PTE for PBMT faults.  I was worried this would cause critical
path issues but I think it is ok.  ReadDataM is used only to created
PBMT and this directly controlls the enable to a flop and the state
inputs to the FSM.
2024-10-11 16:47:18 -05:00
..
bp-results
questa This is a better solution. It's closer to the original book HPTW FSM, 2024-10-11 16:47:18 -05:00
slack-notifier
vcs
verilator remove deprecated verilator scripts 2024-09-30 10:44:36 -07:00
xcelium Add Xcelium readme 2024-10-01 12:48:10 -07:00
imperas-verbose.ic
Makefile Restore riscvdv make targets 2024-09-29 22:27:22 -07:00
rv64gc_CacheSim.py