David Harris 1c22077841 Optimized out second adder from IFU for PC+2		2022-01-27 16:06:24 +00:00
..
cache	1. Modified the cache so it can handle the reset delay internally. This removes the mux from the IFU.	2022-01-26 18:23:39 -06:00
ebu	Renamed wallypipelinedhart to wallypipelinedcore	2022-01-20 16:02:08 +00:00
fpu	Reformatted MIT license to 95 characters	2022-01-07 12:58:40 +00:00
generic	1. Modified the cache so it can handle the reset delay internally. This removes the mux from the IFU.	2022-01-26 18:23:39 -06:00
hazard	Renamed LSUStall to LSUStallM	2022-01-15 00:24:16 +00:00
ieu	Merged in the debug ila updates.	2022-01-18 17:29:21 -06:00
ifu	Optimized out second adder from IFU for PC+2	2022-01-27 16:06:24 +00:00
lsu	Comments in LSU code about restructuring	2022-01-27 15:53:59 +00:00
mmu	Moved Dcache into bus block	2022-01-15 00:39:07 +00:00
muldiv	Better solution to the integer divider interrupt interaction.	2022-01-12 14:22:18 -06:00
privileged	Factored out InstrValidNotFlushedM from each csr*.sv to csr.sv	2022-01-20 16:39:54 -06:00
uncore	Comments in LSU code about restructuring	2022-01-27 15:53:59 +00:00
wally	Renamed wallypipelinedhart to wallypipelinedcore	2022-01-20 16:02:08 +00:00
sdc	piplined directory cleanup	2022-01-07 12:43:50 +00:00