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			193 lines
		
	
	
		
			6.4 KiB
		
	
	
	
		
			Systemverilog
		
	
	
	
	
	
			
		
		
	
	
			193 lines
		
	
	
		
			6.4 KiB
		
	
	
	
		
			Systemverilog
		
	
	
	
	
	
| //////////////////////////////////////////
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| // config.vh
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| //
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| // Written: David_Harris@hmc.edu 4 January 2021
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| // Modified: 
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| //
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| // Purpose: Specify which features are configured
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| //          Macros to determine which modes are supported based on MISA
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| // 
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| // A component of the Wally configurable RISC-V project.
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| // 
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| // Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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| //
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| // SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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| //
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| // Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file 
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| // except in compliance with the License, or, at your option, the Apache License version 2.0. You 
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| // may obtain a copy of the License at
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| //
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| // https://solderpad.org/licenses/SHL-2.1/
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| //
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| // Unless required by applicable law or agreed to in writing, any work distributed under the 
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| // License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, 
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| // either express or implied. See the License for the specific language governing permissions 
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| // and limitations under the License.
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| ////////////////////////////////////////////////////////////////////////////////////////////////
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| 
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| // include shared configuration
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| // `include "wally-shared.vh"
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| `include "BranchPredictorType.vh"
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| 
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| // RV32 or RV64: XLEN = 32 or 64
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| localparam XLEN = 32'd32;
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| 
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| // IEEE 754 compliance
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| localparam IEEE754 = 0;
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| 
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| localparam MISA = (32'h00000104 | 1 << 20 | 1 << 18 | 1 << 12 | 1 << 0 | 1 <<3 | 1 << 5);
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| localparam ZICSR_SUPPORTED = 1;
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| localparam ZIFENCEI_SUPPORTED = 1;
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| localparam COUNTERS = 12'd32;
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| localparam ZICNTR_SUPPORTED = 1;
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| localparam ZIHPM_SUPPORTED = 1;
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| localparam ZFH_SUPPORTED = 1;
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| localparam ZFA_SUPPORTED = 1;
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| localparam SSTC_SUPPORTED = 1;
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| localparam ZICBOM_SUPPORTED = 1;
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| localparam ZICBOZ_SUPPORTED = 1;
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| localparam ZICBOP_SUPPORTED = 1;
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| localparam ZICCLSM_SUPPORTED = 0;
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| localparam ZICOND_SUPPORTED = 1;
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| localparam SVPBMT_SUPPORTED = 0;
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| localparam SVNAPOT_SUPPORTED = 0;
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| localparam SVINVAL_SUPPORTED = 1;
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| 
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| // LSU microarchitectural Features
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| localparam BUS_SUPPORTED = 1;
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| localparam DCACHE_SUPPORTED = 1;
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| localparam ICACHE_SUPPORTED = 1;
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| localparam VIRTMEM_SUPPORTED = 1;
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| localparam VECTORED_INTERRUPTS_SUPPORTED = 1;
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| localparam BIGENDIAN_SUPPORTED = 1;
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| 
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| // TLB configuration.  Entries should be a power of 2
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| localparam ITLB_ENTRIES = 32'd32;
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| localparam DTLB_ENTRIES = 32'd32;
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| 
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| // Cache configuration.  Sizes should be a power of two
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| // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
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| localparam DCACHE_NUMWAYS = 32'd4;
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| localparam DCACHE_WAYSIZEINBYTES = 32'd4096;
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| localparam DCACHE_LINELENINBITS = 32'd512;
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| localparam ICACHE_NUMWAYS = 32'd4;
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| localparam ICACHE_WAYSIZEINBYTES = 32'd4096;
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| localparam ICACHE_LINELENINBITS = 32'd512;
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| localparam CACHE_SRAMLEN = 32'd128;
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| 
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| // Integer Divider Configuration
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| // IDIV_BITSPERCYCLE must be 1, 2, or 4
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| localparam IDIV_BITSPERCYCLE = 32'd2;
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| localparam IDIV_ON_FPU = 0;
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| 
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| // Legal number of PMP entries are 0, 16, or 64
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| localparam PMP_ENTRIES = 32'd16;
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| 
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| // Address space
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| localparam logic [63:0] RESET_VECTOR = 64'h80000000;
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| 
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| // WFI Timeout Wait
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| localparam WFI_TIMEOUT_BIT = 32'd16;
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| 
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| // Peripheral Addresses
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| // Peripheral memory space extends from BASE to BASE+RANGE
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| // Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
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| localparam DTIM_SUPPORTED = 1'b0;
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| localparam logic [63:0] DTIM_BASE       = 64'h80000000;
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| localparam logic [63:0] DTIM_RANGE      = 64'h007FFFFF;
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| localparam IROM_SUPPORTED = 1'b0;
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| localparam logic [63:0] IROM_BASE       = 64'h80000000;
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| localparam logic [63:0] IROM_RANGE      = 64'h007FFFFF;
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| localparam BOOTROM_SUPPORTED = 1'b1;
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| localparam logic [63:0] BOOTROM_BASE   = 64'h00001000;
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| localparam logic [63:0] BOOTROM_RANGE  = 64'h00000FFF;
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| localparam BOOTROM_PRELOAD = 1'b0;
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| localparam UNCORE_RAM_SUPPORTED = 1'b1;
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| localparam logic [63:0] UNCORE_RAM_BASE       = 64'h80000000;
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| localparam logic [63:0] UNCORE_RAM_RANGE      = 64'h07FFFFFF;
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| localparam UNCORE_RAM_PRELOAD = 1'b0;
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| localparam EXT_MEM_SUPPORTED = 1'b0;
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| localparam logic [63:0] EXT_MEM_BASE       = 64'h80000000;
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| localparam logic [63:0] EXT_MEM_RANGE      = 64'h07FFFFFF;
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| localparam CLINT_SUPPORTED = 1'b1;
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| localparam logic [63:0] CLINT_BASE  = 64'h02000000;
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| localparam logic [63:0] CLINT_RANGE = 64'h0000FFFF;
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| localparam GPIO_SUPPORTED = 1'b1;
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| localparam logic [63:0] GPIO_BASE   = 64'h10060000;
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| localparam logic [63:0] GPIO_RANGE  = 64'h000000FF;
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| localparam UART_SUPPORTED = 1'b1;
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| localparam logic [63:0] UART_BASE   = 64'h10000000;
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| localparam logic [63:0] UART_RANGE  = 64'h00000007;
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| localparam PLIC_SUPPORTED = 1'b1;
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| localparam logic [63:0] PLIC_BASE   = 64'h0C000000;
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| localparam logic [63:0] PLIC_RANGE  = 64'h03FFFFFF;
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| localparam  SDC_SUPPORTED = 1'b0;
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| localparam logic [63:0] SDC_BASE =  64'h00013000;
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| localparam logic [63:0] SDC_RANGE = 64'h0000007F;
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| localparam SPI_SUPPORTED = 1'b1;
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| localparam logic [63:0] SPI_BASE = 64'h10040000;
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| localparam logic [63:0] SPI_RANGE = 64'h00000FFF;
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| 
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| // Bus Interface width
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| localparam AHBW = 32'd32;
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| 
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| // Test modes
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| 
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| // Tie GPIO outputs back to inputs
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| localparam GPIO_LOOPBACK_TEST = 1;
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| localparam SPI_LOOPBACK_TEST = 1;
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| 
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| // Hardware configuration
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| localparam UART_PRESCALE = 32'd1;
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| 
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| // Interrupt configuration
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| localparam PLIC_NUM_SRC = 32'd10;
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| // comment out the following if >=32 sources
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| localparam PLIC_NUM_SRC_LT_32 = (PLIC_NUM_SRC < 32);
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| localparam PLIC_GPIO_ID = 32'd3;
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| localparam PLIC_UART_ID = 32'd10;
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| localparam PLIC_SPI_ID = 32'd6;
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| localparam PLIC_SDC_ID = 32'd9;
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| 
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| localparam BPRED_SUPPORTED = 1;
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| // this is an annoying hack for the branch predictor parameterization override.
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| `ifdef BPRED_OVERRIDE
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| localparam BPRED_TYPE = `BPRED_TYPE;
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| localparam BPRED_SIZE = `BPRED_SIZE;
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| `else
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| localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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| localparam BPRED_SIZE = 32'd10;
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| `endif
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| localparam BPRED_NUM_LHR = 32'd6;
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| `ifdef BTB_OVERRIDE
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| localparam BTB_SIZE = `BTB_SIZE;
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| localparam RAS_SIZE = `RAS_SIZE;
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| `else
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| localparam BTB_SIZE = 32'd10;
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| localparam RAS_SIZE = 32'd16;
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| `endif
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| 
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| localparam SVADU_SUPPORTED = 1;
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| localparam ZMMUL_SUPPORTED = 0;
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| 
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| // FPU division architecture
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| localparam RADIX = 32'd4;
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| localparam DIVCOPIES = 32'd2;
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| 
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| // bit manipulation
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| localparam ZBA_SUPPORTED = 1;
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| localparam ZBB_SUPPORTED = 1;
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| localparam ZBC_SUPPORTED = 1;
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| localparam ZBS_SUPPORTED = 1;
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| 
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| // New compressed instructions
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| localparam ZCB_SUPPORTED = 1;
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| localparam ZCA_SUPPORTED = 0;
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| localparam ZCF_SUPPORTED = 0;
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| localparam ZCD_SUPPORTED = 0;
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| 
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| // Memory synthesis configuration
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| localparam USE_SRAM = 0;
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| 
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| `include "config-shared.vh"
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