Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-02 09:45:18 +00:00
Code Issues Packages Projects Releases Wiki Activity
11a21899d5
cvw/wally-pipelined/config/fpga
History
Ross Thompson 11a21899d5 Fixed uart by reversing the bit order on transmit. 
Set prescale to 0.
2021-11-17 10:32:41 -06:00
..
BTBPredictor.txt Fpga simualtion files. 2021-10-11 10:24:40 -05:00
twoBitPredictor.txt Fpga simualtion files. 2021-10-11 10:24:40 -05:00
wally-config.vh Fixed uart by reversing the bit order on transmit. 2021-11-17 10:32:41 -06:00