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https://github.com/openhwgroup/cvw
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61 lines
2.6 KiB
Systemverilog
61 lines
2.6 KiB
Systemverilog
//////////////////////////////////////////
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// wally-shared.vh
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//
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// Written: david_harris@hmc.edu 7 June 2021
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//
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// Purpose: Shared and default configuration values common to all designs
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//
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// A component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
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// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
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// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
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// is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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///////////////////////////////////////////
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// include shared constants
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`include "wally-constants.vh"
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// macros to define supported modes
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// NOTE: No hardware support fo Q yet
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`define A_SUPPORTED ((`MISA >> 0) % 2 == 1)
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`define C_SUPPORTED ((`MISA >> 2) % 2 == 1)
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`define D_SUPPORTED ((`MISA >> 3) % 2 == 1)
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`define F_SUPPORTED ((`MISA >> 5) % 2 == 1)
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`define M_SUPPORTED ((`MISA >> 12) % 2 == 1)
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`define Q_SUPPORTED ((`MISA >> 16) % 2 == 1)
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`define S_SUPPORTED ((`MISA >> 18) % 2 == 1)
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`define U_SUPPORTED ((`MISA >> 20) % 2 == 1)
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// N-mode user-level interrupts are depricated per Andrew Waterman 1/13/21
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//`define N_SUPPORTED ((MISA >> 13) % 2 == 1)
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`define N_SUPPORTED 0
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// logarithm of XLEN, used for number of index bits to select
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`define LOG_XLEN (`XLEN == 32 ? 5 : 6)
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// Number of 64 bit PMP Configuration Register entries (or pairs of 32 bit entries)
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`define PMPCFG_ENTRIES (`PMP_ENTRIES/8)
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// Floating point length FLEN and number of exponent (NE) and fraction (NF) bits
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`define FLEN 64//(`Q_SUPPORTED ? 128 : `D_SUPPORTED ? 64 : 32)
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`define NE 11//(`Q_SUPPORTED ? 15 : `D_SUPPORTED ? 11 : 8)
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`define NF 52//(`Q_SUPPORTED ? 112 : `D_SUPPORTED ? 52 : 23)
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// Disable spurious Verilator warnings
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/* verilator lint_off STMTDLY */
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/* verilator lint_off ASSIGNDLY */
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/* verilator lint_off PINCONNECTEMPTY */
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