slmnemo 05a217c7e7 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main		2022-06-13 12:27:23 -07:00
..
config	changed DCACHE_LINELENINBITS and ICACHE_LINELENINBITS to 512, had to modigy the wfi test to increase timee before interupt to mantain compatability	2022-06-10 00:37:53 +00:00
misc	Renamed wally-pipelined to pipelined	2022-01-04 19:47:41 +00:00
regression	Merge branch 'main' into cacheburstmode	2022-06-09 17:51:03 -07:00
src	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-06-13 12:27:23 -07:00
srt	Update integer division for r4 and qslc_r4a2.c	2022-06-09 16:45:13 -05:00
testbench	Merge branch 'main' into cacheburstmode	2022-06-08 02:21:33 +00:00