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88 lines
5.1 KiB
Makefile
88 lines
5.1 KiB
Makefile
# Makefile added 1/20/22 David_Harris@hmc.edu
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# Expanded and developed by Daniel Torres dtorres@hmc.edu
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# Compile Embench for Wally
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embench_dir = ../../addins/embench-iot
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ARCH=rv32imac_zicsr
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all: build
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run: build size sim
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allClean: clean all
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build: buildspeed buildsize
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buildspeed: build_speedopt_speed build_sizeopt_speed
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buildsize: build_speedopt_size build_sizeopt_size
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# uses the build_all.py python file to build the tests in addins/embench-iot/bd_speed/ optimized for speed and size
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build_speedopt_speed:
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$(embench_dir)/build_all.py --builddir=bd_speedopt_speed --arch riscv32 --chip generic --board rv32wallyverilog --ldflags="-nostartfiles ../../../config/riscv32/boards/rv32wallyverilog/startup/crt0.S -march=$(ARCH)" --cflags="-O2 -nostartfiles -march=$(ARCH)"
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# remove files not used in embench1.0 When changing to 2.0, restore these files
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#rm -rf $(embench_dir)/bd_speedopt_speed/src/md5sum
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#rm -rf $(embench_dir)/bd_speedopt_speed/src/tarfind
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#rm -rf $(embench_dir)/bd_speedopt_speed/src/primecount
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find $(embench_dir)/bd_speedopt_speed/ -type f ! -name "*.*" | while read f; do cp "$$f" "$$f.elf"; done
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build_sizeopt_speed:
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$(embench_dir)/build_all.py --builddir=bd_sizeopt_speed --arch riscv32 --chip generic --board rv32wallyverilog --ldflags="-nostartfiles ../../../config/riscv32/boards/rv32wallyverilog/startup/crt0.S -march=$(ARCH)" --cflags="-Os -nostartfiles -march=$(ARCH)"
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# remove files not used in embench1.0 When changing to 2.0, restore these files
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#rm -rf $(embench_dir)/bd_sizeopt_speed/src/md5sum
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#rm -rf $(embench_dir)/bd_sizeopt_speed/src/tarfind
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#rm -rf $(embench_dir)/bd_sizeopt_speed/src/primecount
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find $(embench_dir)/bd_sizeopt_speed/ -type f ! -name "*.*" | while read f; do cp "$$f" "$$f.elf"; done
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# uses the build_all.py python file to build the tests in addins/embench-iot/bd_speed/ optimized for speed and size
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build_speedopt_size:
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$(embench_dir)/build_all.py --builddir=bd_speedopt_size --arch riscv32 --chip generic --board rv32wallyverilog --ldflags="-nostdlib -nostartfiles ../../../config/riscv32/boards/rv32wallyverilog/startup/dummy.S -march=$(ARCH)" --cflags="-O2 -msave-restore -march=$(ARCH)" --dummy-libs="libgcc libm libc crt0"
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build_sizeopt_size:
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$(embench_dir)/build_all.py --builddir=bd_sizeopt_size --arch riscv32 --chip generic --board rv32wallyverilog --ldflags="-nostdlib -nostartfiles ../../../config/riscv32/boards/rv32wallyverilog/startup/dummy.S -march=$(ARCH)" --cflags="-Os -msave-restore -march=$(ARCH)" --dummy-libs="libgcc libm libc crt0"
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# builds dependencies, then launches sim and finally runs python wrapper script to present results
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sim: sim_build_memfile sim_run speed
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# launches sim to simulate tests on wally
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sim_run:
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wsim rv32gc embench
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#mkdir -p ../../sim/wkdir
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#(cd ../../sim/ && wsim rv32gc embench)
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#cd ../../benchmarks/embench/
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# builds the objdump based on the compiled c elf files
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objdump:
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find $(embench_dir)/bd_*_speed/ -type f -name "*.elf" | while read f; do riscv64-unknown-elf-objdump -S -D "$$f" > "$$f.objdump"; done
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# build memfiles, objdump.lab and objdump.addr files
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sim_build_memfile: objdump
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find $(embench_dir)/bd_*_speed/ -type f -name "*.elf" | while read f; do riscv64-unknown-elf-elf2hex --bit-width 32 --input "$$f" --output "$$f.memfile"; done
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find $(embench_dir)/bd_*_speed/ -type f -name "*.elf.objdump" | while read f; do extractFunctionRadix.sh $$f; done
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# builds the tests for speed, runs them on spike and then launches python script to present results
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# note that the speed python script benchmark_speed.py can get confused if there's both a .output file created from spike and questa
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# you'll need to manually remove one of the two .output files, or run make clean
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spike: buildspeed spike_run speed
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# command to run spike on all of the benchmarks
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spike_run:
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find $(embench_dir)/bd_*opt_speed/ -type f -name "*.elf" | while read f; do spike --isa=rv32imac +signature=$$f.spike.output +signature-granularity=4 $$f; done
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# python wrapper to present results of embench size benchmark
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size: buildsize
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$(embench_dir)/benchmark_size.py --builddir=bd_speedopt_size --json-output > wallySpeedOpt_size.json
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$(embench_dir)/benchmark_size.py --builddir=bd_sizeopt_size --json-output > wallySizeOpt_size.json
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# python wrapper to present results of embench speed benchmark
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speed:
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$(embench_dir)/benchmark_speed.py --builddir=bd_sizeopt_speed --target-module run_wally --cpu-mhz=1 --json-output > wallySizeOpt_speed.json
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$(embench_dir)/benchmark_speed.py --builddir=bd_speedopt_speed --target-module run_wally --cpu-mhz=1 --json-output > wallySpeedOpt_speed.json
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# deletes all files
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clean:
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rm -rf $(embench_dir)/bd_*_speed/
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rm -rf $(embench_dir)/bd_*_size/
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allclean: clean
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rm -rf $(embench_dir)/logs/
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# riscv64-unknown-elf-gcc -O2 -g -nostartfiles -I/home/harris/riscv-wally/addins/embench-iot/support -I/home/harris/riscv-wally/addins/embench-iot/config/riscv32/boards/ri5cyverilator -I/home/harris/riscv-wally/addins/embench-iot/config/riscv32/chips/generic -I/home/harris/riscv-wally/addins/embench-iot/config/riscv32 -DCPU_MHZ=1 -DWARMUP_HEAT=1 -o main.o /home/harris/riscv-wally/addins/embench-iot/support/main.c
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