# check for warnings in Verilog code # The verilator lint tool is faster and better than Modelsim so it is best to run this first. verilator --lint-only --top-module wallypipelinedsoc -Iconfig/rv64ic src/*/*.sv # --lint-only just runs lint rather than trying to compile and simulate # -I points to the include directory where files such as `include wally-config.vh are found # For more exhaustive (and sometimes spurious) warnings, run: # verilator --lint-only -Wall -Iconfig/rv64ic src/* # Unfortunately, this produces a bunch of UNUSED and UNDRIVEN signal warnings in blocks that are configured to not exist.