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46 Commits

Author SHA1 Message Date
Ross Thompson
d6681b5342
Merge pull request #319 from davidharrishmc/dev 
Renamed Performance Counter extension
 2023-06-09 21:21:45 -04:00
David Harris
b15c5e2a51 Added support for menvcfg and senvcfg, including menvcfg.STCE for supervisor timer compare 2023-06-09 14:40:01 -07:00
David Harris
d674c9b45c Other Wally cleanup 2023-06-09 09:37:09 -07:00
David Harris
e2e6f6f255 Added named support for Zicntr and Zihpm 2023-06-09 09:35:51 -07:00
Ross Thompson
9bae203d1c Updated parameterization types. Modelsim version 2022.1 did requires defaults to a 32 bit integer. The base and ranges for the address decoder need to be larger. 2023-06-09 09:28:24 -05:00
Ross Thompson
e56497101a Updated source code to be compatible with verilator 5.011 for lint only. 2023-05-31 10:44:23 -05:00
Ross Thompson
340aac0934 Got the branch predictor parameterized using Lim's method. Also had to add a global enum included in both cvw.sv and the configs which defines the branch predictor types. This should be synthesizable, but I'll need to double check. 2023-05-26 16:00:14 -05:00
Ross Thompson
7c364d5a77 Updated mmu's tlb and hptw to use Lim's parameterization. 2023-05-24 18:02:22 -05:00
Ross Thompson
d3123fc00a Updated a large number of the source files to use parameters rather than `defines. Based on Lim's work. So far there is no simulation slow down. 2023-05-24 14:05:44 -05:00
Ross Thompson
c5aeb08e5c Trying to figure out why the parameterization slowed down modelsim so much. 2023-05-24 12:44:42 -05:00
Ross Thompson
6163fc29e1 Adds local history predictor. 
Fixes performance counters, but not coremark.
 2023-05-23 18:53:46 -05:00
Ross Thompson
1dc7fb567b Merge branch 'localhistory' 
Repair to wave file.
Created implementations of local history. Part of my Ph.D. research.
 2023-05-22 10:13:31 -05:00
David Harris
63473a1477 Changed DIVN comparison from NF to NF+2. Shouldn't make a difference on our word sizes of XLEN=32/64, NF = 10/23/52) but is more proper in the general case. 2023-05-15 03:51:59 -07:00
Ross Thompson
03823a9bc1 Partially working local history repair. 2023-05-11 14:56:26 -05:00
Ross Thompson
c4d6724867 Updated configs for local branch history `defines. 2023-05-02 11:11:04 -05:00
Kip Macsai-Goren
599ebc572e enabled SVADU for rv32/64gc 2023-04-11 17:42:26 -07:00
eroom1966
e65cbc6636 update to allow running of ImperasDV with linux boot 
optimize performance of the tracer
 2023-03-27 09:46:16 +01:00
kipmacsaigoren
10e0935207
Merge branch 'openhwgroup:main' into bit-manip 2023-03-07 21:29:03 -08:00
Kip Macsai-Goren
98ec8d7213 added S time compare to gc configs 2023-03-04 15:46:26 -08:00
Kip Macsai-Goren
5fe8b08253 Merge remote-tracking branch 'upstream/main' into bit-manip 2023-03-03 09:36:44 -08:00
Ross Thompson
3d1ffac7d7 Cleaned up branch predictor performance counters. 2023-03-01 17:05:42 -06:00
Kip Macsai-Goren
9e52ede0cd Merge remote-tracking branch 'upstream/main' into bit-manip 2023-02-28 14:41:51 -08:00
David Harris
5c8fee127b Added support for ZMMUL 2023-02-27 07:29:53 -08:00
David Harris
4579a9d0c2 Renamed HPTW_WRITES_SUPPORTED to SVADU_SUPPORTED 2023-02-26 09:38:32 -08:00
Kip Macsai-Goren
4e0ada0582 removed bit manipulation from rv[xlen]_i. tests still pass 2023-02-22 20:42:52 -08:00
Kip Macsai-Goren
a61b1dca23 added 32 bit tests for bit manipulation 2023-02-22 20:17:52 -08:00
Kip Macsai-Goren
66833f15f2 Merge remote-tracking branch 'upstream/main' into main 2023-02-21 14:48:41 -08:00
David Harris
a774cce05d
Merge pull request #105 from ross144/main 
Fixes to branch target buffer
 2023-02-20 17:07:26 -08:00
Ross Thompson
a14c71bd95 Renamed branch predictors and consolidated global and gshare predictors. 2023-02-20 18:42:37 -06:00
Kevin Kim
d863f77996 added arch32b tests (giving errors in sim however) 2023-02-20 14:39:34 -08:00
David Harris
c6c21463d9 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-02-20 11:28:15 -08:00
David Harris
081a817925
Merge pull request #98 from ross144/main 
New gshare implementation
 2023-02-20 11:27:47 -08:00
David Harris
00daa8aca0 Turned off SSTC_SUPPORTED in buildroot and fpga 2023-02-20 10:37:10 -08:00
David Harris
023ba68088 Extraction script updates to match new reports names 2023-02-20 10:16:45 -08:00
David Harris
1d3b41e0fb New expression for BTB_SIZE to avoid error during sky90 synthesis 2023-02-20 04:02:00 -08:00
Ross Thompson
0d79c0cebe Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-02-19 22:54:27 -06:00
Ross Thompson
b32093b33b Simplified branch predictor. 2023-02-19 22:49:48 -06:00
David Harris
0ac9c9e62a Added BTB_SIZE parameter independent of BPRED_SIIZE 2023-02-19 20:13:50 -08:00
David Harris
bf5f776501 Reduced rv32imc int divider to 2 copies to avoid it being on the critical path 2023-02-19 19:59:30 -08:00
Ross Thompson
9ee48637dc Possibly much better branch predictor implemention. 
The complexity is significantly reduced.
 2023-02-19 00:17:37 -06:00
Kip Macsai-Goren
883a6ca005 merge upstream synth changes 2023-02-18 14:35:19 -08:00
David Harris
d83c61cafc Added SSTC support for supervisor timer compare, but presently disable support. Reenable for rv32gc and rv64gc after tests pass. 2023-02-16 07:37:12 -08:00
Kevin Kim
d7c540d047 edited rv64i convig to support bit manipulation 2023-02-11 12:14:00 -08:00
Kip Macsai-Goren
f9d934e5ae Added necessary files to make bit make and run bit manipulation tests as part of regression 2023-02-10 10:35:19 -08:00
David Harris
54eafe6b9e Removed redundant USE_SRAM from wally-shared.vh (already in wally-config.vh) 2023-02-04 18:49:25 -08:00
David Harris
99d179dd3e Removed pipelined level of hierarchy 2023-02-02 14:14:11 -08:00