Ross Thompson
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cdf73d3b51
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Updated comments.
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2023-07-06 15:24:26 -05:00 |
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Ross Thompson
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e4555dc4af
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Removed unused parameter.
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2023-07-06 14:57:07 -05:00 |
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Ross Thompson
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a963e50e88
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It's a bit hacky, but the plic now passes the regression test and should be compatible with the fpga.
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2023-07-06 14:07:37 -05:00 |
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Ross Thompson
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df56ff73c0
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This is at least functionally correct, but has verilator lint issues.
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2023-07-06 11:53:34 -05:00 |
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Ross Thompson
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c000366d3e
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closer, but the wally32/64priv tests are failing.
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2023-07-05 17:47:38 -05:00 |
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Ross Thompson
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98147e116a
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Partially solved fpga boot.
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2023-07-05 17:30:55 -05:00 |
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Harshini Srinath
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57f4c8a3e4
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Update plic_apb.sv
Program clean up
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2023-06-15 10:08:16 -07:00 |
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Ross Thompson
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3cc85349b5
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Uncore is now parameterized.
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2023-05-26 16:24:12 -05:00 |
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Ross Thompson
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ca4b058373
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Modified plic and uart to remove async reset. This removes vivado critical warning.
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2023-03-24 20:37:48 -05:00 |
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Ross Thompson
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46b1bca4fc
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Fixed all tap/space issue in RTL.
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2023-03-24 17:32:25 -05:00 |
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David Harris
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78eb90715c
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Removed pipelined level of hierarchy
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2023-02-02 14:14:11 -08:00 |
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