13 Commits

Author	SHA1	Message	Date
Ross Thompson	d81af3bca8	Fixed HTRANS not changing after accepting HREADY. This exposed a bug in uncore.	2022-09-29 11:54:03 -05:00
Ross Thompson	4062fe56c0	Possible fix to the bus cache interaction.	2022-09-27 11:34:33 -05:00
Ross Thompson	0fcc314d06	Yesterday David and I found what is likely a bug in our AHB implementation. HTRANS was getting reset to 2 rather than 0 at the end of a burst transaction. This is fixed.	2022-09-26 12:48:26 -05:00
Ross Thompson	38edbde966	Renamed RW signals through the caches, bus interfaces, and IFU/LSU. ... CPU to $ is called LSURWM or IFURWF. CPU to Bus is called BusRW $ to Bus is called CacheBusRW.	2022-09-23 11:46:53 -05:00
Ross Thompson	2c86badeb2	pipelining of fetch into evict AHB requests.	2022-09-13 17:51:55 -05:00
Ross Thompson	bc15f6c5e4	Added logic to make burst optional.	2022-09-06 09:21:21 -05:00
Ross Thompson	2554f96662	Cleaned up hacks to ram.	2022-09-04 14:52:40 -05:00
Ross Thompson	221367efb9	Disabled AHB burst mode, which discovered a bug. ... Multimanger bug in how back to back requests were arbitrated.	2022-09-03 22:31:41 -05:00
Ross Thompson	00cffb0aa5	Renamed state in buscachefsm to match AHB phases.	2022-09-02 17:17:40 -05:00
Ross Thompson	6f366c643d	Possible fix for AHB trailing ~HREADY bug.	2022-09-02 16:58:35 -05:00
Ross Thompson	eae56a890c	marked possible improvement to ahb bus fsms.	2022-08-31 23:57:08 -05:00
Ross Thompson	7598fbcb3b	Reduced busfsm to 3 states!	2022-08-31 16:11:59 -05:00
Ross Thompson	12d1ef2144	More renaming.	2022-08-31 14:49:08 -05:00