Commit Graph

81 Commits

Author SHA1 Message Date
Ross Thompson
e5bae37b0b
Merge pull request #327 from harshinisrinath1001/main
Fixed the spacing in the fpu module
2023-06-12 11:53:52 -04:00
Harshini Srinath
420ee8dad9
Update unpackinput.sv
Program clean up
2023-06-11 17:09:11 -07:00
Harshini Srinath
7e0dedea19
Update fctrl.sv
Program clean up
2023-06-11 17:03:29 -07:00
Harshini Srinath
3bc164a4ca
Update fcmp.sv
Program clean up
2023-06-11 16:54:52 -07:00
Harshini Srinath
74fa15bcb4
Update fsgninj.sv
Program clean up
2023-06-11 16:52:00 -07:00
Harshini Srinath
2739ea26a7
Update fregfile.sv
Program clean up
2023-06-11 16:49:20 -07:00
Harshini Srinath
7770f7e79b
Update fpu.sv
Program clean up
2023-06-11 16:43:31 -07:00
Harshini Srinath
ca170c8b81
Update fhazard.sv
Program clean up
2023-06-11 16:06:44 -07:00
Harshini Srinath
d9b58c44cf
Update fcvt.sv
Program clean up
2023-06-11 16:05:14 -07:00
Harshini Srinath
21015c8e4a
Update fcvt.sv
Program clean up
2023-06-11 15:59:20 -07:00
David Harris
a192214f86 Fixed lint errors, presumably detected by latest version of verilator 2023-06-11 06:48:42 -07:00
Harshini Srinath
fb1e5e401f
Update fctrl.sv
Program clean up
2023-06-10 19:38:50 -07:00
Harshini Srinath
71248a7523
Update fcmp.sv
Program clean up
2023-06-10 19:35:58 -07:00
Harshini Srinath
db2ac9604a
Update fcmp.sv
Program clean up
2023-06-10 19:34:58 -07:00
Harshini Srinath
02e8689999
Update fclassify.sv
Program clean up
2023-06-10 19:30:18 -07:00
James Stine
51d77b0414 Update some spacing to make it look better 2023-06-05 11:03:06 -05:00
Ross Thompson
340aac0934 Got the branch predictor parameterized using Lim's method. Also had to add a global enum included in both cvw.sv and the configs which defines the branch predictor types. This should be synthesizable, but I'll need to double check. 2023-05-26 16:00:14 -05:00
Ross Thompson
e6d25b7f70 Finished fpu parameterization using Lim's method. 2023-05-26 14:40:06 -05:00
Ross Thompson
ef2bb7df93 fdiv is now parameterized using Lim's method. 2023-05-26 14:25:14 -05:00
Ross Thompson
c76eb315bc Parameterized fpu's unpack and fma using Lim's method. 2023-05-26 14:12:25 -05:00
Ross Thompson
8aba897386 Update top level parameterized. Simulation slowed down to 4.5 minutes. 2023-05-26 12:13:11 -05:00
David Harris
bfa35d727b Fixed redundant check of SupportedFmt on fmv that caused coverage problem on fctrl 2023-04-29 05:58:40 -07:00
Sydeny
4595c22fe1 Addressing Redundant logic around BadNanBox, fpu coverage from 96.61% to 96.77% 2023-04-26 14:35:43 -07:00
David Harris
a5b80bc440 Removed unproven fdivsqrt exclusion 2023-04-22 15:27:05 -07:00
David Harris
8be5ed9b67 Attempted to cause interrupt during fdivsqrt. Fixed enabling fpu in fpu.S. Fdivsqrt exclusions for coverage. 2023-04-22 12:22:45 -07:00
David Harris
e11212598f fdivsqrt cleanup 2023-04-20 17:35:01 -07:00
David Harris
f9ca280e01 continued cleanup 2023-04-20 16:48:23 -07:00
David Harris
ea7c50e0ee Reordered fdivsqrtpreproc to follow logic 2023-04-20 16:38:47 -07:00
David Harris
ca0269c094 Started fdivsqrtpreproc flow organization 2023-04-20 16:25:19 -07:00
David Harris
c431278fe6 Fmv h/q comments in controller 2023-04-20 16:24:58 -07:00
David Harris
94d1533264
Merge pull request #256 from cturek/main
Simplifying fds to follow diagram
2023-04-20 16:07:22 -07:00
Sydeny
b76ed145e6 removed comments for fixed bugs in fpu, increased coverage: fpu from 93.51% to 93.62%, ifu from 78.56% to 78.75%, lsu from 88.96% to 88.98% 2023-04-19 13:30:12 -07:00
Cedar Turek
30bd1e2a33 created fdivsqrtcycles, moved cycles calculation from FSM to preproc 2023-04-18 16:14:45 -07:00
Cedar Turek
871d495ca1 gave integer bits to D instead of adding manually everywhere 2023-04-18 15:41:04 -07:00
Cedar Turek
054c8d638c moved D flop to preproc 2023-04-18 15:14:17 -07:00
Sydeny
4748fa0f6b Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-04-17 13:51:16 -07:00
David Harris
bdd5f5e611
Merge pull request #251 from masonadams25/main
Removed redundent expression to increase coverage
2023-04-17 12:37:27 -07:00
Mason Adams
4468086e06
Removed redundent expression to increase coverage 2023-04-17 14:13:26 -05:00
David Harris
b00b8ba366 merged coverage exclusions 2023-04-17 10:17:48 -07:00
Sydeny
af51b6f16c trimming comments on fctrl bug fixes 2023-04-15 00:48:32 -07:00
Limnanthes Serafini
95223bf11c More cleanup 2023-04-13 21:34:50 -07:00
Limnanthes Serafini
28dd41291a More cleanup 2023-04-13 21:02:30 -07:00
Limnanthes Serafini
94b686fcf6 More changes 2023-04-13 21:02:15 -07:00
David Harris
cfca584bc7 Merged coverage-exclusions 2023-04-13 18:15:23 -07:00
David Harris
b378001213
Merge pull request #237 from SydRiley/main
fctrl coverage at 100% after removing redundancies from conditionals
2023-04-13 17:10:46 -07:00
Limnanthes Serafini
e33721fbe4 Merge branch 'cachesim' of https://github.com/AlecVercruysse/cvw into cachesim 2023-04-13 16:54:16 -07:00
Limnanthes Serafini
c427b4c896 Misc typo and indent fixing. 2023-04-13 16:54:15 -07:00
David Harris
8db317133c Starting fdivsqrt cleanup 2023-04-13 16:53:33 -07:00
Sydeny
1dab409bae Updating changes to fctrl.sv to reach 100% coverage. Excluding un-used sources of instructions for the ifu. 2023-04-13 16:27:53 -07:00
Sydeny
e2520c8a27 fctrl coverage at 100% after removing redundancies from conditional statements 2023-04-12 13:07:30 -07:00