Ross Thompson
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e5bae37b0b
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Merge pull request #327 from harshinisrinath1001/main
Fixed the spacing in the fpu module
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2023-06-12 11:53:52 -04:00 |
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Harshini Srinath
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420ee8dad9
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Update unpackinput.sv
Program clean up
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2023-06-11 17:09:11 -07:00 |
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Harshini Srinath
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7e0dedea19
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Update fctrl.sv
Program clean up
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2023-06-11 17:03:29 -07:00 |
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Harshini Srinath
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3bc164a4ca
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Update fcmp.sv
Program clean up
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2023-06-11 16:54:52 -07:00 |
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Harshini Srinath
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74fa15bcb4
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Update fsgninj.sv
Program clean up
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2023-06-11 16:52:00 -07:00 |
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Harshini Srinath
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2739ea26a7
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Update fregfile.sv
Program clean up
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2023-06-11 16:49:20 -07:00 |
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Harshini Srinath
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7770f7e79b
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Update fpu.sv
Program clean up
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2023-06-11 16:43:31 -07:00 |
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Harshini Srinath
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ca170c8b81
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Update fhazard.sv
Program clean up
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2023-06-11 16:06:44 -07:00 |
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Harshini Srinath
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d9b58c44cf
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Update fcvt.sv
Program clean up
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2023-06-11 16:05:14 -07:00 |
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Harshini Srinath
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21015c8e4a
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Update fcvt.sv
Program clean up
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2023-06-11 15:59:20 -07:00 |
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David Harris
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a192214f86
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Fixed lint errors, presumably detected by latest version of verilator
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2023-06-11 06:48:42 -07:00 |
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Harshini Srinath
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fb1e5e401f
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Update fctrl.sv
Program clean up
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2023-06-10 19:38:50 -07:00 |
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Harshini Srinath
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71248a7523
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Update fcmp.sv
Program clean up
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2023-06-10 19:35:58 -07:00 |
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Harshini Srinath
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db2ac9604a
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Update fcmp.sv
Program clean up
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2023-06-10 19:34:58 -07:00 |
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Harshini Srinath
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02e8689999
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Update fclassify.sv
Program clean up
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2023-06-10 19:30:18 -07:00 |
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James Stine
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51d77b0414
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Update some spacing to make it look better
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2023-06-05 11:03:06 -05:00 |
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Ross Thompson
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340aac0934
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Got the branch predictor parameterized using Lim's method. Also had to add a global enum included in both cvw.sv and the configs which defines the branch predictor types. This should be synthesizable, but I'll need to double check.
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2023-05-26 16:00:14 -05:00 |
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Ross Thompson
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e6d25b7f70
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Finished fpu parameterization using Lim's method.
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2023-05-26 14:40:06 -05:00 |
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Ross Thompson
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ef2bb7df93
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fdiv is now parameterized using Lim's method.
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2023-05-26 14:25:14 -05:00 |
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Ross Thompson
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c76eb315bc
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Parameterized fpu's unpack and fma using Lim's method.
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2023-05-26 14:12:25 -05:00 |
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Ross Thompson
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8aba897386
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Update top level parameterized. Simulation slowed down to 4.5 minutes.
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2023-05-26 12:13:11 -05:00 |
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David Harris
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bfa35d727b
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Fixed redundant check of SupportedFmt on fmv that caused coverage problem on fctrl
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2023-04-29 05:58:40 -07:00 |
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Sydeny
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4595c22fe1
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Addressing Redundant logic around BadNanBox, fpu coverage from 96.61% to 96.77%
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2023-04-26 14:35:43 -07:00 |
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David Harris
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a5b80bc440
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Removed unproven fdivsqrt exclusion
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2023-04-22 15:27:05 -07:00 |
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David Harris
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8be5ed9b67
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Attempted to cause interrupt during fdivsqrt. Fixed enabling fpu in fpu.S. Fdivsqrt exclusions for coverage.
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2023-04-22 12:22:45 -07:00 |
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David Harris
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e11212598f
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fdivsqrt cleanup
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2023-04-20 17:35:01 -07:00 |
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David Harris
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f9ca280e01
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continued cleanup
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2023-04-20 16:48:23 -07:00 |
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David Harris
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ea7c50e0ee
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Reordered fdivsqrtpreproc to follow logic
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2023-04-20 16:38:47 -07:00 |
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David Harris
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ca0269c094
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Started fdivsqrtpreproc flow organization
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2023-04-20 16:25:19 -07:00 |
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David Harris
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c431278fe6
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Fmv h/q comments in controller
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2023-04-20 16:24:58 -07:00 |
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David Harris
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94d1533264
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Merge pull request #256 from cturek/main
Simplifying fds to follow diagram
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2023-04-20 16:07:22 -07:00 |
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Sydeny
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b76ed145e6
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removed comments for fixed bugs in fpu, increased coverage: fpu from 93.51% to 93.62%, ifu from 78.56% to 78.75%, lsu from 88.96% to 88.98%
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2023-04-19 13:30:12 -07:00 |
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Cedar Turek
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30bd1e2a33
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created fdivsqrtcycles, moved cycles calculation from FSM to preproc
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2023-04-18 16:14:45 -07:00 |
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Cedar Turek
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871d495ca1
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gave integer bits to D instead of adding manually everywhere
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2023-04-18 15:41:04 -07:00 |
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Cedar Turek
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054c8d638c
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moved D flop to preproc
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2023-04-18 15:14:17 -07:00 |
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Sydeny
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4748fa0f6b
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Merge branch 'main' of https://github.com/openhwgroup/cvw into main
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2023-04-17 13:51:16 -07:00 |
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David Harris
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bdd5f5e611
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Merge pull request #251 from masonadams25/main
Removed redundent expression to increase coverage
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2023-04-17 12:37:27 -07:00 |
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Mason Adams
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4468086e06
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Removed redundent expression to increase coverage
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2023-04-17 14:13:26 -05:00 |
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David Harris
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b00b8ba366
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merged coverage exclusions
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2023-04-17 10:17:48 -07:00 |
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Sydeny
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af51b6f16c
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trimming comments on fctrl bug fixes
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2023-04-15 00:48:32 -07:00 |
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Limnanthes Serafini
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95223bf11c
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More cleanup
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2023-04-13 21:34:50 -07:00 |
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Limnanthes Serafini
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28dd41291a
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More cleanup
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2023-04-13 21:02:30 -07:00 |
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Limnanthes Serafini
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94b686fcf6
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More changes
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2023-04-13 21:02:15 -07:00 |
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David Harris
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cfca584bc7
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Merged coverage-exclusions
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2023-04-13 18:15:23 -07:00 |
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David Harris
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b378001213
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Merge pull request #237 from SydRiley/main
fctrl coverage at 100% after removing redundancies from conditionals
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2023-04-13 17:10:46 -07:00 |
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Limnanthes Serafini
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e33721fbe4
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Merge branch 'cachesim' of https://github.com/AlecVercruysse/cvw into cachesim
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2023-04-13 16:54:16 -07:00 |
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Limnanthes Serafini
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c427b4c896
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Misc typo and indent fixing.
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2023-04-13 16:54:15 -07:00 |
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David Harris
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8db317133c
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Starting fdivsqrt cleanup
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2023-04-13 16:53:33 -07:00 |
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Sydeny
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1dab409bae
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Updating changes to fctrl.sv to reach 100% coverage. Excluding un-used sources of instructions for the ifu.
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2023-04-13 16:27:53 -07:00 |
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Sydeny
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e2520c8a27
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fctrl coverage at 100% after removing redundancies from conditional statements
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2023-04-12 13:07:30 -07:00 |
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