4 Commits

Author	SHA1	Message	Date
Ross Thompson	68745d40f2	Modified FPGA to add additional signals to ILA. Created advanced trigger for ILA using vivado's tsm language.	2021-12-12 17:21:44 -06:00
Ross Thompson	cbb5e4440f	Improved FPGA makefile and fixed timing constraints in clock converter.	2021-12-03 10:05:13 -06:00
Ross Thompson	d5f445e0fd	Added make clean to fpga IP generator.	2021-11-29 18:42:28 -06:00
Ross Thompson	a528a86607	Created Makefile to manage IP generation.	2021-11-29 18:33:58 -06:00