9 Commits

Author	SHA1	Message	Date
Ross Thompson	cfca77172e	Added fence counter.	2023-03-02 23:29:20 -06:00
Ross Thompson	f32f8c109a	Added csr write counter, sfence vma counter, interrupt counter, and exception counter.	2023-03-02 23:21:29 -06:00
Ross Thompson	a313b10912	Added store stall to performance counters.	2023-03-02 23:10:54 -06:00
Ross Thompson	b98e007a53	Cleaned up branch predictor performance counters.	2023-03-01 17:05:42 -06:00
Ross Thompson	a6917d07f3	Name cleanup.	2023-02-28 17:48:58 -06:00
Ross Thompson	2ebe600f54	Name changes to reflect diagrams.	2023-02-28 15:37:25 -06:00
Ross Thompson	8bd4a4c35b	Renamed signals to match new figures.	2023-02-24 19:51:47 -06:00
David Harris	5b370bdc0f	Added SSTC support for supervisor timer compare, but presently disable support. Reenable for rv32gc and rv64gc after tests pass.	2023-02-16 07:37:12 -08:00
David Harris	78eb90715c	Removed pipelined level of hierarchy	2023-02-02 14:14:11 -08:00