Jacob Pease
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7f72fb8583
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Updated riscv,isa-extensions property with the correct syntax. Added riscv,cbom-block-size.
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2024-07-12 09:28:54 -05:00 |
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Jacob Pease
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1a2607c3d9
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Commented out riscv,isa-extensions from Arty device tree until Linux kernel is updated.
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2024-07-11 10:53:18 -05:00 |
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Rose Thompson
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1c54a5698b
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Modified the device trees to include all the minor extensions.
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2023-11-14 13:54:16 -06:00 |
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Rose Thompson
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6b7ff50a84
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Reduced Arty A7 clock speed to 20Mhz to support Zicclsm.
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2023-11-13 16:44:02 -06:00 |
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Ross Thompson
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3156d5abab
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Somehow the arty A7 was missing the update for the console baud rate setting.
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2023-10-03 17:37:13 -05:00 |
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Ross Thompson
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06efd2cdde
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Pushed performance of arty a7 to 23Mhz.
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2023-07-31 14:13:09 -05:00 |
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Ross Thompson
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dbf9e5da0b
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Updated Arty A7 fpga config and device tree to 256MiB main memory.
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2023-07-25 15:11:47 -05:00 |
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Ross Thompson
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e99c6e5e1d
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Updated arty a7 device clock speed for 20Mhz.
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2023-07-24 11:50:00 -05:00 |
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Ross Thompson
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49b87d4550
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Merge branch 'main' of github.com:ross144/cvw
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2023-07-24 10:47:05 -05:00 |
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Ross Thompson
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065e5e98c9
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Improved timing constraints for arty a7 to push clock speed to 20Mhz.
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2023-07-24 10:46:49 -05:00 |
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Ross Thompson
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481f27e3fe
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Updated arty a7 device tree.
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2023-07-21 19:08:45 -05:00 |
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Ross Thompson
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d04d2afed2
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Modified the LSU/IFU and caches to improve critical path. Arty A7 went from 15 to 17Mhz. I believe we can push all the way to 20+Mhz with relatively little effort. Along the way I'm fixing up the scripts build the linux images for the flash card.
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2023-07-21 13:06:27 -05:00 |
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Ross Thompson
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d1ea52f6ea
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Added artya7 device tree.
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2023-07-17 16:01:02 -05:00 |
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