60 Commits

Author	SHA1	Message	Date
Ross Thompson	4c8952de6a	Converted branch predictor preloads to use system verilog rather than modelsim's load command.	2021-03-15 12:39:44 -05:00
Noah Boorstin	f48af209c4	busybear: make CSRs only weird for us	2021-03-05 00:46:32 +00:00
Noah Boorstin	26d4024b33	busybear: fix bootram range	2021-03-01 17:45:21 +00:00
Noah Boorstin	6e70ae8b3d	busybear: add 2nd dtim for bootram	2021-02-28 16:08:54 +00:00
Noah Boorstin	edd5e9106d	busybear: remove gpio, start adding 2nd ram	2021-02-28 06:02:40 +00:00
Noah Boorstin	4358f086be	update busybear testbench to conform to new structure ... aaaaaaaaaaaaaaaaaahhhh so many changes also the testbench now uses another internal signal, which I don't like, but I can't think of a better option rn	2021-01-30 19:19:00 +00:00
Noah Boorstin	194d5b55ab	update busybear testbench to conform to new structure	2021-01-29 17:46:50 +00:00
Noah Boorstin	dabb026104	busybear: lie about MISA to match OVP's MISA	2021-01-29 00:58:56 -05:00
Noah Boorstin	6c567aab9a	Update busybear tests to conform to new directory structure	2021-01-25 20:37:18 -05:00
David Harris	fa18052348	Added test configurations	2021-01-25 11:28:43 -05:00