17 Commits

Author	SHA1	Message	Date
Ross Thompson	c253b882be	Reworked the hazards to eliminate StallFCause. Flush and CSRWrites now flush F,D,E stages and set the correct PCNextF in the M stage.	2022-12-15 09:53:35 -06:00
David Harris	643a2e7cf9	Use FPU divider for integer division when F is supported	2022-12-14 17:03:13 -08:00
David Harris	3a07d56d33	Renamed FPUStallD to FCvtIntStallD	2022-12-02 11:55:23 -08:00
David Harris	d72068d582	Only stall FPU to IEU on convert instructions with dependencies	2022-08-23 12:57:18 -07:00
David Harris	05aa18fe14	Cleaned up fcvt selection control to IEU and FPUIllegalInst signals	2022-08-23 12:17:19 -07:00
David Harris	0e489443f2	Finished FPU-LSU interface cleanup	2022-08-22 13:43:04 -07:00
Madeleine Masser-Frye	6229779b97	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally	2022-06-21 20:31:06 +00:00
Madeleine Masser-Frye	3c08861479	switched comparator to dc flip version	2022-06-21 20:30:33 +00:00
Katherine Parry	03d823f5d7	added fld in rv32 - needs testing	2022-06-20 22:53:13 +00:00
Katherine Parry	5f7072bd96	postprocessing unit created and passing all tests	2022-06-13 22:47:51 +00:00
David Harris	9065b684f8	Added stalls for pending SFENCE.VMA and FENCE.I in hazard unit	2022-06-02 09:37:59 -07:00
David Harris	61199ccd13	More signal cleanup	2022-05-12 15:39:44 +00:00
Ross Thompson	58668812c1	Moved WriteDataM register into LSU.	2022-03-23 14:17:59 -05:00
David Harris	3d2671a8b0	Reformatted MIT license to 95 characters	2022-01-07 12:58:40 +00:00
David Harris	2df92af488	Capitalized LSU and IFU, changed MulDiv to MDU	2022-01-07 04:30:00 +00:00
David Harris	27c1d73cb1	Code cleanup	2022-01-07 04:07:04 +00:00
David Harris	115287adc8	Renamed wally-pipelined to pipelined	2022-01-04 19:47:41 +00:00