Thomas Fleming
3c49fd08f6
Remove imem from testbenches
2021-04-14 20:20:34 -04:00
Noah Boorstin
d66fcbc4ab
busybear: use (slightly) less terrible verilog
2021-04-14 00:18:44 -04:00
Noah Boorstin
c75455cc41
busybear testbench updates
...
start speculative checking on CSR* satp, *
add some slight delays in some CSR checkings to make them deterministic
I realize this verilog is incredibly un-idiomatic. But I still don't
know of anything better. If you figure it out, please let me know
2021-04-14 00:00:27 -04:00
Noah Boorstin
14d2ad1e2d
try to remove git-lfs stuff
2021-04-08 13:23:11 -04:00
Noah Boorstin
284d583877
add busybear boot files with git-lfs
2021-04-05 19:38:43 -04:00
Noah Boorstin
0e3f013212
busybear: reenable 'ruthless' CSR checking
2021-04-05 12:53:30 -04:00
Noah Boorstin
f4e5642c62
busybear: temporary stop after 800k instrs
2021-04-03 21:37:57 -04:00
Noah Boorstin
75f58c4df5
busybear: temporarially stop checking CSRs
2021-03-31 14:14:32 -04:00
Noah Boorstin
118e846ef7
busybear: clean up questa warnings
2021-03-31 14:04:57 -04:00
ushakya22
6b9ae41302
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-03-30 15:25:07 -04:00
Noah Boorstin
d02c88dab5
busybear: stop NOPing out atomics
...
and bump regression to check for 800k instrs, up from 200k
2021-03-25 13:29:56 -04:00
Noah Boorstin
849641f31e
busybear: add better warning on illegal instruction
...
...also it seems that mret is being picked up as an illegal instruction??
2021-03-22 18:24:35 -04:00
Noah Boorstin
34b8f750ce
busybear: temporarially force rf[5] correct after failure to read CSR
2021-03-22 18:12:41 -04:00
Noah Boorstin
77dd0b4504
busybear: allow overwriting read values
2021-03-22 17:28:44 -04:00
Noah Boorstin
7bb31c3287
busybear: finally get the right error
2021-03-22 16:52:22 -04:00
Noah Boorstin
2aa76b27e1
busybear: comment out some debug printing
2021-03-22 14:54:05 -04:00
Noah Boorstin
74bcd9b994
regression: expect 200k instead of 100k busybear instrs
...
and a minor busybear bugfix
2021-03-22 14:47:52 -04:00
Shreya Sanghai
09faa40eb6
fixed minor bugs in testbench
2021-03-18 17:37:10 -04:00
Noah Boorstin
bfa7aedd35
busybear: add seperate message on bad memory access becasue its confusing
2021-03-16 21:42:26 -04:00
Noah Boorstin
400791163e
copy Ross's branch predictor preload change into busybear
2021-03-15 18:27:27 -04:00
Noah Boorstin
a8b242a6ef
busybear: account for CSR moving
2021-03-11 06:45:14 +00:00
Noah Boorstin
4a8b689f62
busybear: better NOPing out of float instructions
2021-03-08 21:24:19 +00:00
Noah Boorstin
c780a25f92
busybear: better instrF checking
...
So this now checks instrF only when StallD is low. @kaveh I'd love your
opinion on this. I don't know if this is a good idea or not. Ideally we
should probably be checking InstrRawD instead, but I kind of want to stay
checking the instr in the F stage instead of D for now. Idk if this is worth
staying in F, I can't really see any big downsides to checking the instruction in
D except that PCD isn't an external signal, but neither is StallD, so.....
Anyway I'd love others' thoughts on this
2021-03-08 19:48:12 +00:00
Noah Boorstin
93c9c57426
busybear: load mem files from verilog instead of .do
2021-03-08 19:26:26 +00:00
Noah Boorstin
1a11b60664
busybear: slight testbench update
2021-03-05 19:00:40 +00:00
Noah Boorstin
62b441f3f5
busybear: probably discovered bug in ahb code
2021-03-01 20:56:04 +00:00
Noah Boorstin
965d48afe7
busybear: only check pc when it actually changes
2021-03-01 19:08:35 +00:00
Noah Boorstin
4833b36535
busybear: more adapting to new memory system
2021-03-01 18:50:42 +00:00
Noah Boorstin
db86d20d11
busybear: check instead of providing InstrF
2021-02-28 16:46:53 +00:00
Noah Boorstin
e5e345d161
busybear: instantiate normal wallypipelinedsoc
2021-02-28 06:02:21 +00:00
Noah Boorstin
ab9247d625
busybear: add main ram loading, better instr checking also
2021-02-26 20:26:54 +00:00
kaveh Pezeshki
ad631ec3a1
fixed sensitivity list on error checking always block, removed useless once and for all
2021-02-26 13:41:16 -05:00
kaveh pezeshki
d32421822c
restored
2021-02-26 02:22:08 -08:00
kaveh pezeshki
3bb8e0d918
condensed always blocks to avoid race conditions
2021-02-24 11:35:28 -08:00
Noah Boorstin
3d82ceffb7
busybear: preload bootram
...
thanks to Prof Stine for the .do file commands
@kaveh can you check line 201? it does nothing, but things break when
I remove that line
2021-02-24 18:46:09 +00:00
kaveh pezeshki
b36a5614b4
added comments for RAM and bootram, removed trailing whitepace
2021-02-23 21:28:33 -08:00
Noah Boorstin
c8e9edcc43
busybear: add bootram section in the same manner as ram
2021-02-24 02:02:28 +00:00
Noah Boorstin
a24270c4ca
busybear: add support for subwords in ram
...
this is really weird and i'm not sure if i did it right. I'd love if @kaveh could review it
2021-02-24 01:51:18 +00:00
Noah Boorstin
00605864fc
busybear: start adding ram
2021-02-23 22:01:23 +00:00
Noah Boorstin
d5e7a8a4cf
busybear: remove unused signals
2021-02-23 19:38:19 +00:00
Noah Boorstin
ceb7df3561
busybear: instantiate soc instead of hart
2021-02-23 18:59:06 +00:00
Noah Boorstin
5835641c6c
busybear testbench: check (almost) all the CSRs
2021-02-16 20:03:24 -05:00
Noah Boorstin
7312da1a99
busybear: allow testbench to ignore lack of MMU for now
...
I'd really like to go over this with someone else, not sure if this is
a good thing to be doing
If it is, we're at 1M instructions!
2021-02-12 20:08:56 +00:00
Noah Boorstin
97302dd12f
busybear: slightly neater error handling
2021-02-12 17:21:56 +00:00
Noah Boorstin
5bf6add635
bump into virtual/physcial memory?
2021-02-11 23:06:12 -05:00
Noah Boorstin
4427780a41
busybear: more updates
...
now gets to instruction 839037 before failing
also updates to match new gdb output format
umm there seems to be something wrong with the SSTATUS CSR. Just leaving
it out for now, will come back and check it later
2021-02-11 22:42:58 -05:00
Noah Boorstin
01c0f9db63
Busybear: next week of updates
...
- move parsed instructions out of git, to /courses/e190ax/busybear_boot
- parsed first 1M instructions, and now parse from split GDB runs
- now at about 230k instructions, can't progress further for now since atomic instructions
aren't implemented yet
2021-02-07 03:14:48 +00:00
Noah Boorstin
dc881bd51b
busybear: add more CSRs
2021-02-04 20:13:36 +00:00
Noah Boorstin
d9431d5bed
busybear: check initial values also
2021-02-04 19:22:09 +00:00
Noah Boorstin
8d53e36bbc
Busybear: start checking CSRs
...
scounteren and mcounteren are currenly manually deleted from the CSRs list
(see slack channl #linux-bringup)
and 3 of the CSRs referenced are skipped because of weird locations for them
oh and this doesn't check their initial state, just their changing. This could be a problem
2021-02-02 06:06:03 +00:00
