20 Commits

Author	SHA1	Message	Date
David Harris	39d318fb2a	Fixed path to riscvOVPsimPlus	2022-01-21 00:12:14 +00:00
David Harris	57f859a882	fir.c	2022-01-20 17:15:53 +00:00
David Harris	771c44698b	Added FIR example	2022-01-20 16:57:36 +00:00
David Harris	3005d82dba	Created linux directory for linux config	2022-01-20 00:04:23 +00:00
David Harris	ebf9f5d526	riscvsingle reparittioned to match Ch4	2022-01-17 16:57:32 +00:00
David Harris	7d13740a11	Mixed C and assembly language test cases; SRT initial version passing tests	2022-01-13 21:45:54 +00:00
David Harris	4b7ee9815e	C sum example	2022-01-12 09:04:41 +00:00
James E. Stine	f91b635652	remove extraneous	2022-01-11 16:01:48 -06:00
James E. Stine	14e53099f8	Update on assembly simple/spike	2022-01-11 15:59:56 -06:00
David Harris	10921accdb	Added inline assembly to simple	2022-01-11 21:32:30 +00:00
David Harris	486cfdc3a5	Added C test cases	2022-01-11 21:01:48 +00:00
David Harris	0b3d3b768b	Do file for riscvsingle	2022-01-10 16:26:18 +00:00
David Harris	86857a877b	Added fulladder example files	2022-01-10 16:15:05 +00:00
David Harris	39d5570d2c	Added riscvsingle. Removed unnecessary coremark config. Added compiler flags for Coremark.	2022-01-10 05:04:13 +00:00
David Harris	0e023e29d8	Code cleanup	2022-01-07 04:07:04 +00:00
David Harris	2b4c81fe98	Fixed unpacking bug; regression runs again	2022-01-06 18:22:30 +00:00
David Harris	52a38c5856	Added performance counting to sumtest and added imperas32/64periph to testbench.	2021-12-29 00:28:51 +00:00
David Harris	48bb534658	Started FIR test code and started incorporating Imperas tests	2021-12-25 22:39:51 +00:00
David Harris	9b491788b2	Checked in Chapter 2 C and assembly examples	2021-12-25 06:35:36 -08:00
David Harris	0f319b45c1	Do File cleanups	2021-12-17 17:45:26 -08:00