3 Commits

Author	SHA1	Message	Date
Ross Thompson	9070b4adf5	OMG. the ddr3 has it's own mmcm (pll) which had incorreclty specified the input clock period as 3000 ps rather than 6000 ps so the pll was running at twice the speed. I speed the whole weekend on this. :(	2023-04-17 11:10:19 -05:00
Ross Thompson	6123efd5b2	Updates for arty a7.	2023-04-10 17:02:19 -05:00
Ross Thompson	5aa614858f	Started putting together the arty a7 board package files.	2023-04-10 13:15:55 -05:00