16 Commits

Author	SHA1	Message	Date
Ross Thompson	0cb5369351	Renamed BTB misprediction to BTA.	2023-03-03 00:18:34 -06:00
Ross Thompson	aabb454d1c	Added the i and d cache cycle counters.	2023-03-02 23:54:56 -06:00
Ross Thompson	b98e007a53	Cleaned up branch predictor performance counters.	2023-03-01 17:05:42 -06:00
Ross Thompson	a6917d07f3	Name cleanup.	2023-02-28 17:48:58 -06:00
Ross Thompson	2ebe600f54	Name changes to reflect diagrams.	2023-02-28 15:37:25 -06:00
Ross Thompson	bc5aecf948	Merge branch 'main' of https://github.com/openhwgroup/cvw	2023-02-27 09:48:03 -06:00
Ross Thompson	318189e5e6	Signal name changes.	2023-02-27 00:39:19 -06:00
David Harris	21b28fd1bb	Renamed DAPageFault to UpdateDA	2023-02-26 17:51:45 -08:00
Ross Thompson	8bd4a4c35b	Renamed signals to match new figures.	2023-02-24 19:51:47 -06:00
David Harris	f0566173e6	Merge branch 'main' of https://github.com/openhwgroup/cvw into dev	2023-02-21 09:58:18 -08:00
David Harris	a445e53e8d	Fixed Issue #106: fld rasies load access fault instead of illegal instruction. The IEU controller had considered all fp loads and stores to be legal regardless of whether the FPU is enabled or the type is supported. Merged illegal instruction detection from both units into the Decode stage, saving two bits of pipeline register as well.	2023-02-21 09:32:17 -08:00
Ross Thompson	545af7697f	Simiplified BTB.	2023-02-20 15:39:42 -06:00
Ross Thompson	6fbca64eb7	Experimental branch prediction optimization.	2023-02-10 15:45:56 -06:00
Ross Thompson	ca0eb5a591	Modified branch predictor to use InstrValidE and InstrValidD rather than the more complex InstrClassE | WrongClassE logic.	2023-02-10 10:33:10 -06:00
David Harris	6b9ae4fc89	Fixed merge issues on synthDC PR	2023-02-04 04:13:40 -08:00
David Harris	78eb90715c	Removed pipelined level of hierarchy	2023-02-02 14:14:11 -08:00