Ross Thompson
e8d149df5e
Merge branch 'main' of github.com:ross144/cvw into main
2023-03-17 00:48:04 -05:00
Ross Thompson
b5fa5bb47a
Added notes on how to run QEMU to generate linux image.
2023-03-17 00:47:52 -05:00
Mike Thompson
112967142c
Merge pull request #139 from ross144/main
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Updates for book
2023-03-14 15:44:59 -04:00
Ross Thompson
407b3c488d
Book updates.
2023-03-14 13:09:50 -05:00
Ross Thompson
8d1a7154c2
Merge pull request #138 from eroom1966/main
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Fix MISA RO and UART addresses
2023-03-13 23:32:56 -05:00
Ross Thompson
a27051b8a8
Updated NextAdr to NextSet.
2023-03-13 14:54:13 -05:00
Ross Thompson
cb019f9aed
Updated CAdr to CacheSet.
2023-03-13 14:53:00 -05:00
Ross Thompson
c18a626abe
More accurate c model gshare results.
2023-03-13 13:54:04 -05:00
Ross Thompson
ef2c5ce6a7
On our way to finish the C reference data collection.
2023-03-13 13:32:09 -05:00
Ross Thompson
77fe3c5546
Merge branch 'main' of github.com:ross144/cvw into main
2023-03-13 13:30:49 -05:00
Ross Thompson
c57e2a2140
Added reference data.
2023-03-13 13:30:43 -05:00
Ross Thompson
2d49c4582c
Modified branch logger to indicate when the warmup period is done.
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The branch-predictor-simulator also changed to support this.
2023-03-13 13:26:27 -05:00
eroom1966
0d260accb4
Fix MISA RO and UART addresses
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It appears on inspection that the MISA register is read only in Wally
In which case this has now also been set in the ImperasDV representation
Also the Addresss for the UART R/W privileges are corrected
2023-03-13 11:07:19 +00:00
Ross Thompson
0441e3b736
Created script to batch processes all the embench branch outcomes into C model branch prediction rate.
2023-03-12 23:15:44 -05:00
Ross Thompson
755b1bfe53
Renamed script to parse branch.log
2023-03-12 22:40:59 -05:00
Ross Thompson
ae42150519
Added script to separate branch.log into separate logs for each benchmark.
2023-03-12 17:58:36 -05:00
Ross Thompson
568d0031d2
Modified the branch log to include markers for the start and end of tests with exclusion of warmup period.
2023-03-12 17:15:56 -05:00
Ross Thompson
ede9d49ce4
Changes BTA to BPBTA.
2023-03-12 14:36:46 -05:00
Ross Thompson
e233b63752
Replaced DCACHE parameter with READ_ONLY_CACHE as the name was confusing in chapter 10.
2023-03-12 13:21:22 -05:00
Kevin Kim
bc9cd4a26e
more checks in bitmanip decode
2023-03-10 17:17:24 -08:00
Kevin Kim
869c7283e8
formatting
2023-03-10 14:32:01 -08:00
Kevin Kim
827cf567e6
removed redundant convinvb signal
2023-03-10 14:18:24 -08:00
Kevin Kim
a5841c6fb2
removed redundant condinvb mux
2023-03-10 14:17:38 -08:00
Ross Thompson
23f6d58247
Merge pull request #137 from davidharrishmc/dev
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Fixes to wally-batch for coverage
2023-03-10 15:36:24 -06:00
David Harris
a1ffff57ba
Fixes to wally-batch for coverage
2023-03-10 13:33:32 -08:00
Ross Thompson
501bec511c
Merge pull request #136 from davidharrishmc/dev
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Bug fix in wally-regression
2023-03-10 15:11:25 -06:00
David Harris
8107f585c8
Fixed crash with wrong number of arguments for coverage in regression-wally
2023-03-10 13:10:28 -08:00
David Harris
ed22433916
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2023-03-10 12:47:30 -08:00
David Harris
2db97d20fa
Removed unneeded echo from setup
2023-03-10 12:08:24 -08:00
David Harris
2527930409
Merge pull request #135 from eroom1966/main
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Enhancements to support the PMA ranges
2023-03-10 06:13:33 -08:00
eroom1966
8e657c335e
Enhancements to support the PMA ranges
2023-03-10 14:09:22 +00:00
David Harris
c44a3ac8a6
Merge pull request #134 from ross144/main
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Updated testbench to report performance coutners for coremark.
2023-03-09 16:09:03 -08:00
David Harris
a3691cc5f7
Modified regression and wally-batch.do to support -coverage
2023-03-09 15:59:57 -08:00
David Harris
06b99035d4
Modified setup to add Imperas/scripts/cvw to path
2023-03-09 15:59:28 -08:00
David Harris
2614448218
Simplified SLT and SLTU code in ALU
2023-03-09 15:14:52 -08:00
Kevin Kim
6a429c671d
Merge branch 'openhwgroup:main' into bit-manip
2023-03-09 12:45:41 -08:00
Kevin Kim
6ee15c6e2c
more comprehensive illegal b instr. check
2023-03-09 12:44:51 -08:00
Kevin Kim
5853854f52
fixed bmu bug
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- accidentally deleted count instruction decode
2023-03-09 12:35:42 -08:00
Ross Thompson
fa8a550e12
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-03-09 13:29:38 -06:00
Kevin Kim
ba13f6794e
Merge branch 'bit-manip' of https://github.com/kipmacsaigoren/cvw into bit-manip
2023-03-08 16:22:47 -08:00
Kevin Kim
2175702f6d
cleaner bmu decode logic
2023-03-08 16:22:43 -08:00
Ross Thompson
6d2d7d181e
Updated testbench to record coremark performance counters.
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Added comment about mtval probably not being correct for compressed instructions.
2023-03-08 17:11:27 -06:00
David Harris
9a6514f20d
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2023-03-08 10:37:28 -08:00
David Harris
6c14d30dd7
Merge pull request #133 from eroom1966/main
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Add support for setting PMP registers + Async DV
2023-03-08 05:17:45 -08:00
eroom1966
68f3e31547
Add support for setting PMP registers
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Add support for async DV
2023-03-08 12:44:53 +00:00
kipmacsaigoren
10e0935207
Merge branch 'openhwgroup:main' into bit-manip
2023-03-07 21:29:03 -08:00
David Harris
ec0873ff16
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2023-03-07 14:49:23 -08:00
David Harris
bbcb9c7354
Merge pull request #127 from kipmacsaigoren/priv-tests
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Added full testing support for S time interrupts
2023-03-07 14:49:12 -08:00
Kevin Kim
d3a1b82458
Merge pull request #3 from kipmacsaigoren/illegal_specific
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More specific decoding for base instructions
2023-03-07 14:08:14 -08:00
Kevin Kim
f2090d25c4
Merge branch 'bit-manip' into illegal_specific
2023-03-07 14:07:59 -08:00
