29 Commits

Author	SHA1	Message	Date
bbracker	7694342d4e	ignore mhpmcounters because QEMU doesn't implement them	2021-07-20 13:37:52 -04:00
bbracker	c9775de3b2	testbench hack to ignore MTVAL for illegal instr faults; testbench upgrade to not check PCW for illegal instr faults; testbench hack to not check speculative instrs following an MRET (it seems MRET has 1 stage more latency than a branch instr)	2021-07-20 05:40:39 -04:00
bbracker	5347a58192	major fixes to CSR checking	2021-07-20 00:22:07 -04:00
bbracker	aeaf4a31f0	MemRWM shouldn't factor into PCD checking	2021-07-19 18:03:30 -04:00
bbracker	5911029d2b	make testbench ignore MIP because of timing imprecision and because QEMU maybe isn't getting MTIP right anyways	2021-07-19 17:11:42 -04:00
bbracker	009e9d97bf	adapt testbench to removal of ReadDataWEn signal	2021-07-19 15:42:14 -04:00
bbracker	02de6014b2	adapt testbench to removal of signal	2021-07-19 15:41:50 -04:00
bbracker	77b690faf0	make testbench check the same CSRs that QEMU logs; change CLINT to reset MTIMECMP to -1 so that we don't instantly get a timer interrupt upon reset	2021-07-19 15:13:03 -04:00
bbracker	f4f3ef0307	linux testbench progress	2021-07-18 18:47:40 -04:00
bbracker	6feb95c779	swapped out linux testbench signal names	2021-07-17 14:48:12 -04:00
David Harris	c897bef8cd	Moved BOOTTIM to 0x1000-0x1FFF. Added logic to detect an access to undefined memory and assert HREADY so bus doesn't hang.	2021-07-04 01:19:38 -04:00
Ben Bracker	9709bd78e1	stop busybear from hanging	2021-07-02 17:22:09 -05:00
bbracker	9927f771cc	linux testbench now ignores HWRITE glitches caused by flush glitches	2021-06-25 09:28:52 -04:00
bbracker	2694a7a43f	made testbench-linux's PCDwrong be FlushD	2021-06-25 08:15:19 -04:00
bbracker	b84419ff4e	overhauled linux testbench and spoofed MTTIME interrupt	2021-06-24 01:42:35 -04:00
David Harris	aef408af58	Reversed [0:...] with [...:0] in bus widths across the project	2021-06-21 01:17:08 -04:00
bbracker	665a67f442	linux actually uses FPU now!	2021-06-20 22:29:21 -04:00
bbracker	1f2a967e0f	read from MSTATUS workaround because QEMU has incorrect MSTATUS	2021-06-20 10:11:39 -04:00
bbracker	2611d214a6	testbench update b/c QEMU extends 32b CSRs to 64b	2021-06-20 09:24:19 -04:00
bbracker	9469367da3	make buildroot ignore SSTATUS because QEMU did not originally log it	2021-06-20 05:31:24 -04:00
bbracker	78f4703dc9	MSTATUS workaround	2021-06-20 04:48:09 -04:00
bbracker	927d99cf3b	workaround for ignoring MTIME	2021-06-20 02:26:39 -04:00
bbracker	3e32ba3684	make buildroot waves only turn on after a user-specified point	2021-06-20 00:39:30 -04:00
bbracker	f84a689c19	fixed PCtext error by using blocking assignments	2021-06-18 17:37:40 -04:00
bbracker	958f60c704	restore graphical buildroot sim	2021-06-18 11:58:16 -04:00
David Harris	e03912f64c	Cleaned up name of MTIME register in CSRC	2021-06-18 07:53:49 -04:00
bbracker	832e4fc7e3	making linux waveforms more useful	2021-06-17 08:37:37 -04:00
bbracker	e93e528aa1	changed parsedCSRs2] to parsedCSRs	2021-06-17 05:18:14 -04:00
David Harris	1e67db2f0c	Second attept to commit refactoring config files	2021-06-07 12:37:46 -04:00