78 Commits

Author	SHA1	Message	Date
Ross Thompson	6eefa5b1e3	Fixed another bug in the btb.	2023-02-20 17:54:22 -06:00
Ross Thompson	d2b7047744	Fixed forwarding bug in the BTB.	2023-02-20 17:03:45 -06:00
Ross Thompson	fdd007a903	Found a bug where the d and i cache misses were not recorded in the performance counters.	2023-02-20 16:00:29 -06:00
Ross Thompson	545af7697f	Simiplified BTB.	2023-02-20 15:39:42 -06:00
David Harris	36b2d530c4	Merge pull request #98 from ross144/main ... New gshare implementation	2023-02-20 11:27:47 -08:00
David Harris	4cc8448b16	Removed unused and incomplete ROM macro instantations	2023-02-20 05:59:57 -08:00
David Harris	626715befd	Fixed IROM size parameters	2023-02-20 05:32:43 -08:00
David Harris	472c7da399	New expression for BTB_SIZE to avoid error during sky90 synthesis	2023-02-20 04:02:00 -08:00
Ross Thompson	4db249ca5d	Simplified BTB by removing the valid bit. the instruction class provides the equivalent information.	2023-02-19 23:53:20 -06:00
Ross Thompson	407d9e7b4a	Merge branch 'main' of https://github.com/openhwgroup/cvw	2023-02-19 22:54:27 -06:00
Ross Thompson	0f98cfe5b4	Simplified branch predictor.	2023-02-19 22:49:48 -06:00
David Harris	d07c6386b2	Added BTB_SIZE parameter independent of BPRED_SIIZE	2023-02-19 20:13:50 -08:00
David Harris	20ced0653c	Parameterized btb to depend on BPRED_SIZE	2023-02-19 19:59:07 -08:00
David Harris	5287c54278	Adjusted DTIM to always be 512B independent of XLEN	2023-02-19 16:14:38 -08:00
David Harris	00d54cfe6c	PMP checker size check to avoid spurious warnings	2023-02-19 16:08:23 -08:00
David Harris	fa0406b554	Moved conditional instantiation outside pmpchecker	2023-02-19 15:31:00 -08:00
David Harris	8db49c83c4	Disabled W64M register for RV32	2023-02-19 07:03:31 -08:00
David Harris	527566c38a	Fixed RAM instantiations	2023-02-19 06:31:41 -08:00
Ross Thompson	89aa57e25e	Possibly much better branch predictor implemention. ... The complexity is significantly reduced.	2023-02-19 00:17:37 -06:00
Ross Thompson	9f997eb5d0	Minor fix.	2023-02-18 23:55:46 -06:00
David Harris	92d4acf118	Removed unused PredInstrClassE register from bpred	2023-02-18 05:59:25 -08:00
David Harris	1af99c7aee	Removed unused weq0M register fron fdivsqrtpostproc	2023-02-18 05:57:39 -08:00
David Harris	adc22235be	Fixed issue #57 of sign selection for improperly NaN-boxed number	2023-02-18 05:34:40 -08:00
David Harris	7923d32c3a	Fixed unpacking of illegal NaN box. Fixed issue #56 of sign injection NaN	2023-02-18 05:25:38 -08:00
David Harris	63a6567ed3	Created PostBox signal to NaN-box malformed NaNs of excess length. Fixes Issue #55	2023-02-17 20:51:43 -08:00
David Harris	154d7eb9ef	Fixed RAM bugs and refactored with read taking place after clock edge rather than before.	2023-02-17 19:14:38 -08:00
David Harris	daf2f822c2	Memory synthesis updates	2023-02-17 15:33:49 -08:00
David Harris	3f2f48ddc6	Continue fixing memory macros for synthesis	2023-02-17 15:15:37 -08:00
Ross Thompson	ae8b01b8d4	Renamed globalhistory predictor.	2023-02-17 16:08:34 -06:00
Ross Thompson	2661ec97d8	Fixed global history predictor.	2023-02-17 16:05:48 -06:00
Ross Thompson	a98a85f144	More updates.	2023-02-17 15:53:49 -06:00
Ross Thompson	1d9335c934	Updated global history predictor.	2023-02-17 15:53:15 -06:00
David Harris	aba29f6cc8	Synthesis with memories	2023-02-17 13:51:05 -08:00
Ross Thompson	e0a8974c7d	Fixed a branch predictor performance issue.	2023-02-17 15:37:03 -06:00
Ross Thompson	c97fa02300	Merge branch 'main' of github.com:ross144/cvw	2023-02-17 10:58:16 -06:00
Ross Thompson	3398c5156b	Fixed bug with branch predictor.	2023-02-17 10:57:50 -06:00
David Harris	0d2baed943	Reverted lab3 changes in dev branch	2023-02-16 18:10:05 -08:00
David Harris	26ea8b03c3	Merge branch 'lab3_2023' of https://github.com/openhwgroup/cvw into dev	2023-02-16 17:57:51 -08:00
David Harris	33eb5423cb	Update datapath.sv	2023-02-16 17:53:31 -08:00
David Harris	113b124721	Update controller.sv	2023-02-16 17:52:44 -08:00
David Harris	43afa34338	Update alu.sv	2023-02-16 17:52:25 -08:00
Ross Thompson	b62bacbac3	keep this commit off of cvw.	2023-02-16 11:05:24 -06:00
David Harris	5b370bdc0f	Added SSTC support for supervisor timer compare, but presently disable support. Reenable for rv32gc and rv64gc after tests pass.	2023-02-16 07:37:12 -08:00
James Stine	a3aeff2703	Update if-then-else for ram items	2023-02-15 18:12:12 -06:00
Ross Thompson	c6920ab08e	Merge branch 'main' of https://github.com/openhwgroup/cvw	2023-02-15 11:29:39 -06:00
Ross Thompson	911023f441	Merge branch 'main' of github.com:ross144/cvw	2023-02-13 18:54:07 -06:00
Ross Thompson	fc3baa6846	Updated gshare (no speculation) to have better performance.	2023-02-13 18:52:52 -06:00
Ross Thompson	f3c8c6e60a	More fixeds to global history.	2023-02-13 18:08:51 -06:00
Ross Thompson	6ea830cf44	Fixed global history predictor.	2023-02-13 18:08:13 -06:00
Ross Thompson	3847d9e39a	Updated global history predictor.	2023-02-13 18:07:32 -06:00