Ross Thompson
659b511616
Lee Moore found another bug using imperas.
...
An ITLB miss concurrent with a d cache flush did not interlock.
The LSU should suppress the d cache flush until the hptw fills the missing tlb entry.
2023-02-02 23:52:21 -06:00
James Stine
924e55325c
Forgot 1p ram for rv32gc : cache data 64x128 and cache tags 64x22
2023-02-02 13:54:25 -06:00
James Stine
9a5023a17e
Modify generic/mem for rv32gc ram2
2023-02-02 13:28:18 -06:00
Ross Thompson
3838ab232b
Fixed bug #47 discovered by Lee Moore.
...
ECALL and EBREAK do not commit their results.
2023-02-02 08:52:06 -06:00
Ross Thompson
7f207527ce
Merge branch 'main' of https://github.com/openhwgroup/cvw into main
2023-02-02 08:48:19 -06:00
James Stine
fc5692629a
Update ram2 and other memories and associated wrappers
2023-02-01 17:03:48 -06:00
Ross Thompson
3276353b8c
Minor branch predictor bug fix.
2023-02-01 10:59:38 -06:00
Ross Thompson
51a2a71410
Removed unused signal.
2023-02-01 10:27:58 -06:00
David Harris
ce82d8d550
Fixed merge conflict to get synthesis working again
2023-02-01 04:43:57 -08:00
Ross Thompson
6fb624950e
Minor change to btb.
2023-02-01 00:24:54 -06:00
Madeleine Masser-Frye
57b35c293d
added memories (not tested)
2023-02-01 06:08:27 +00:00
Ross Thompson
d5c1ac4e11
Minor optimization to btb.
2023-01-31 22:03:51 -06:00
David Harris
5d7dcfb748
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2023-01-31 14:40:19 -08:00
Ross Thompson
7166fcd4d2
Updates to RAS.
2023-01-31 15:17:32 -06:00
Ross Thompson
dd556e8763
Simplified RAS.
2023-01-31 14:54:05 -06:00
Ross Thompson
122809b2b2
RAS file name was spelled wrong.
2023-01-31 14:35:05 -06:00
Ross Thompson
bfbf534830
Created scripts to install imperas and run a single test using imperas.
2023-01-31 13:51:05 -06:00
Ross Thompson
eededd1ba9
Fixed remaining bugs in the imperas merge.
2023-01-31 13:04:26 -06:00
Ross Thompson
0678e70b4b
Merge branch 'imperas'
2023-01-31 12:46:22 -06:00
Ross Thompson
52bdf32575
Minor bug fix in gshare.
2023-01-31 10:45:32 -06:00
Ross Thompson
e7b91d5934
Renamed signals in RAS.
2023-01-31 10:44:11 -06:00
Ross Thompson
b4854d8e94
Found small bug in gshare.
2023-01-31 00:17:49 -06:00
Ross Thompson
20e99dce73
Fixed parameterization in testbench.
2023-01-31 00:11:01 -06:00
Ross Thompson
b64b3016e2
Parameterized testbench branch predictor preload.
2023-01-31 00:08:11 -06:00
Ross Thompson
22ef051603
More branch predictor cleanup.
2023-01-30 23:55:52 -06:00
Ross Thompson
61759af9dc
Improved signal names.
2023-01-30 23:51:04 -06:00
Ross Thompson
165b4858d7
Major cleanup of branch predictor.
2023-01-30 23:37:34 -06:00
Ross Thompson
57ab5a7488
Simplified gshare.
2023-01-30 19:27:18 -06:00
Ross Thompson
0e29a5f9c2
Minor gshare optimization.
2023-01-30 18:13:12 -06:00
David Harris
6777fd9b55
Restored top-level modules without import statements
2023-01-30 12:54:40 -08:00
David Harris
49e45f45b7
Moved out version of wally using package because synthesis isn't working yet
2023-01-30 12:48:52 -08:00
David Harris
1e7c9f026c
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2023-01-30 11:00:51 -08:00
Ross Thompson
7a4218788c
Imperas found a real bug in virtual memory.
...
If the instruction address spilled across two pages and the second page misses the TLB,
the HPTW received a tlb miss at the address of the first page rather than the second.
After the walk the TLB was updated with the PTE from the first page at the address of the
second page.
Example bug
Instruction PCF = 0x2ffe
First page in 0x2ffe and second page in 0x3000.
The second page misses the TLB and generates HPTW request at 0x2ffe rather than 0x3000.
TLB is updated with PTE from 0x2ffe at 0x3000.
2023-01-30 11:47:51 -06:00
Ross Thompson
63267ff378
optimized branch predictor by removing unnecessary registers.
2023-01-29 22:39:37 -06:00
David Harris
4c75a90e39
Moved WALLY-status-fp-enabled tests from a to priv suites
2023-01-29 17:19:53 -08:00
David Harris
327303e2e2
Moved shared constants into per-processor config and removed wally-constants
2023-01-29 15:55:37 -08:00
Ross Thompson
dd9d2be89c
Updated global history branch predictcor with the gshare improvements.
2023-01-29 16:26:44 -06:00
David Harris
7705209141
Merged PR#37 branch predictor
2023-01-29 14:25:28 -08:00
David Harris
db07c6618b
Removed unused TESTSBP parameter
2023-01-29 14:19:24 -08:00
Ross Thompson
a9902337cf
Merge branch 'main' of https://github.com/openhwgroup/cvw
...
This merges the branch predictor improvements into the main repo.
2023-01-29 15:24:20 -06:00
Ross Thompson
7c8b2b685f
gshare cleanup.
2023-01-29 15:07:45 -06:00
Ross Thompson
2a336cfb71
Gshare cleanup.
2023-01-29 15:06:35 -06:00
Ross Thompson
244885d3fa
Found bug in gshare.
2023-01-29 15:03:25 -06:00
David Harris
a099cbb45b
Fixed configuration of ram to use macro when depth is corret
2023-01-29 11:35:17 -08:00
David Harris
d6b0a8f9a1
Removed unused wally-harvard.do script
2023-01-29 11:34:35 -08:00
David Harris
f37bae1062
Converted rv32ic to rv32imc
2023-01-29 11:33:54 -08:00
Ross Thompson
49a7d10914
Fixed typo in testbench branch logger.
2023-01-29 01:00:52 -06:00
Ross Thompson
5c83de4c46
Fixed another bug with the branch logger.
2023-01-29 00:59:59 -06:00
Ross Thompson
6afd7f4fac
Fixed bug in the branch logger.
2023-01-29 00:58:50 -06:00
Ross Thompson
250a8df7c3
Updated testbench for branch logger.
2023-01-29 00:56:11 -06:00
