Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-01 17:34:27 +00:00
Code Issues Packages Projects Releases Wiki Activity
5,372 Commits 4 Branches 2 Tags 53 MiB
4ca27d1475
Commit Graph

5372 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Ross Thompson
d1cdbdd8df Merge branch 'main' of github.com:ross144/cvw 2023-02-06 16:34:28 -06:00
Kevin Kim
be4d80a725 modified shifter to configure for Zbb and handle rotates 
- alu handles rotates
 2023-02-06 17:55:37 +00:00
David Harris
711ed99b3b Merge pull request #67 from eroom1966/main 
Add RVVI Address size to configure MMU operations
 2023-02-06 08:01:28 -08:00
eroom1966
ae3ac02556 remove dead code for ignoring fflags/fcsr 2023-02-06 15:53:29 +00:00
eroom1966
d88b56eebc remove leading space 2023-02-06 14:01:05 +00:00
eroom1966
232bfbcfd0 remerge changes 2023-02-06 13:43:12 +00:00
Kevin Kim
a81a48007e zbb handles sign 2023-02-05 16:50:13 +00:00
Kevin Kim
4c28c28644 began sign/zero extend 2023-02-05 16:37:32 +00:00
David Harris
69e9c85d7a Merge pull request #63 from davidharrishmc/dev 
Cleanup
 2023-02-04 20:15:12 -08:00
David Harris
077edbf78d changed USE_SRAM to modify wally-config rather than wally-shared 2023-02-04 20:13:24 -08:00
David Harris
7cf98811f3 Parenthesized reduction operators to avoid DC lint 2023-02-04 18:49:47 -08:00
David Harris
66fa1e67bb Removed redundant USE_SRAM from wally-shared.vh (already in wally-config.vh) 2023-02-04 18:49:25 -08:00
David Harris
2303da01a8 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-02-04 18:32:31 -08:00
David Harris
4091418f00 Merge pull request #64 from mmasserfrye/main 
Now modifying dtim and irom even when USESRAM=1
 2023-02-04 18:11:39 -08:00
Kevin Kim
b871277435 modularized byte instruction handling into byte.sv; passes lint 2023-02-05 01:04:39 +00:00
Kevin Kim
8782f2d352 modularized count into cnt.sv; passes lint 2023-02-05 00:48:26 +00:00
Kevin Kim
0fa7798607 zbb handles popcnt and passes lint 2023-02-05 00:11:24 +00:00
Kevin Kim
4b6a757d68 added population count in generic modules 2023-02-05 00:11:12 +00:00
Madeleine Masser-Frye
9454eb921d Now modifying dtim and irom even when USESRAM=1 2023-02-05 00:02:50 +00:00
Kevin Kim
8b6aad27c7 Started count instructions 2023-02-04 20:01:41 +00:00
David Harris
6abd5dd644 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-02-04 09:59:44 -08:00
David Harris
5256d3a625 More progress on debug.S, but it crashes in Spike 2023-02-04 09:59:22 -08:00
Ross Thompson
4fed1d5e3d Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-02-04 11:28:26 -06:00
Ross Thompson
d7a65b2576 Updates to imperas test bench. 2023-02-04 11:28:23 -06:00
David Harris
43668a3fc5 Developing debug test 2023-02-04 08:31:47 -08:00
David Harris
b09002c71d Fixed license on testbench files 2023-02-04 08:19:20 -08:00
David Harris
2c69adc5f7 Started making debug testcase 2023-02-04 08:18:55 -08:00
David Harris
ae54860805 Renamed wally-piplined.do to wally.do 2023-02-04 04:38:41 -08:00
David Harris
835f793db9 Merge pull request #62 from davidharrishmc/dev 
../synthDC/Makefile
 2023-02-04 04:29:56 -08:00
David Harris
be08523ba0 Added license headers 2023-02-04 04:29:27 -08:00
David Harris
f89e642312 ../synthDC/Makefile 2023-02-04 04:19:09 -08:00
David Harris
52e028fc7a Merge pull request #53 from davidharrishmc/dev 
Removed pipelined hierarchy and renamed regression to sim
 2023-02-04 04:15:02 -08:00
David Harris
6b9ae4fc89 Fixed merge issues on synthDC PR 2023-02-04 04:13:40 -08:00
David Harris
e831baf335 Improved illegal NaN-box detection and formatted fsgninj 2023-02-04 03:42:20 -08:00
David Harris
18750e0f0a Merge pull request #61 from mmasserfrye/main 
USE_SRAM parameter, makefile config cleaning
 2023-02-04 03:28:44 -08:00
Madeleine Masser-Frye
4be41ae25c finishing the job of the last commit 2023-02-04 10:24:01 +00:00
Madeleine Masser-Frye
b78ce62748 added use sram parameter, cleaned up config writing, added single synth functionality to wallySynth 2023-02-04 09:50:36 +00:00
David Harris
fa276d67b4 Merge pull request #60 from ross144/main 
Optimized PCLink logic.
 2023-02-03 16:42:27 -08:00
Ross Thompson
f5468ebd7a Replaced PCLinkX registers with a +2/4 adder in the execution stage. 
David and I estimate this is lower hardware cost.
 2023-02-03 18:19:47 -06:00
Ross Thompson
583d87afc7 Change CurrPtr to Ptr in RAS. 2023-02-03 17:40:20 -06:00
Kevin Kim
202c45bef2 Merge branch 'main' of https://github.com/kipmacsaigoren/cvw 2023-02-03 18:39:26 +00:00
Kevin Kim
9c3f062f4d arch32ba includes the 32i_m tests instead of 64 2023-02-03 17:40:02 +00:00
Kip Macsai-Goren
fc549d1595 Merge remote-tracking branch 'upstream/main' into main 2023-02-03 09:31:06 -08:00
David Harris
34fbfeb5cd Removed redundant line from synthesis makefile 2023-02-03 08:36:51 -08:00
David Harris
97ee3732fe Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-02-03 08:36:11 -08:00
David Harris
4dca69f205 Updated division radix test script with paths, but script is out of date for files it manipulates 2023-02-03 08:36:03 -08:00
Kevin Kim
3d67e48bef Merge branch 'main' of https://github.com/kipmacsaigoren/cvw 2023-02-03 16:00:36 +00:00
Kevin Kim
d47a44a62f ALU changes (ZBB) 
- handles inverted operand instructions
- handles shift-and-add instructions
 2023-02-03 16:00:32 +00:00
David Harris
1763de52ea Merge pull request #54 from ross144/main 
Fixed issue #50, itlb and dcache flush interlock
 2023-02-03 06:30:30 -08:00
Ross Thompson
4547da80ea Fixed bug #49. 
FFLAGS was updated while the pipeline was stalled.
Also I found serveral performance counters which had similar issues.
 2023-02-03 00:39:26 -06:00