16 Commits

Author	SHA1	Message	Date
Limnanthes Serafini	0aadbd8492	Outfiles for the failing tests.	2023-04-05 02:42:09 -07:00
Limnanthes Serafini	6f7620e7c1	CacheSim edits, tests. I/D$ logging, Lim's version	2023-04-04 21:12:35 -07:00
David Harris	99a1683f8e	Debug test case updates	2023-02-21 09:33:36 -08:00
David Harris	2b80004db4	Debug test case update	2023-02-15 06:42:38 -08:00
David Harris	44fef2f2a1	debug simulating, produing discrepancy	2023-02-06 16:47:56 -08:00
David Harris	4c219de13d	Fixed floating point crash in debug.S	2023-02-06 15:38:57 -08:00
David Harris	5256d3a625	More progress on debug.S, but it crashes in Spike	2023-02-04 09:59:22 -08:00
David Harris	43668a3fc5	Developing debug test	2023-02-04 08:31:47 -08:00
David Harris	2c69adc5f7	Started making debug testcase	2023-02-04 08:18:55 -08:00
Ross Thompson	97feea2f48	Possibly working speculative global history.	2023-01-08 23:46:53 -06:00
Ross Thompson	a35fb3addd	core part of global history works now. forwarding is still broken.	2023-01-08 23:35:02 -06:00
Ross Thompson	f8c656f1e0	Simiplified global history branch predictor.	2023-01-04 23:41:55 -06:00
Ross Thompson	c3b77926d5	I think I finally fixed a long hidden bug in the replacement policy. The figures in the textbook are correct. There was small bug in the rtl.	2022-12-18 18:30:35 -06:00
Ross Thompson	e8c1d14abb	Have a basic cache test to fill all ways and sets.	2022-12-18 17:20:30 -06:00
Ross Thompson	7a352edf13	Attempted to make a cache test.	2022-12-18 17:15:08 -06:00
Ross Thompson	9d1cb9337e	Updated tests for fpga and BP.	2022-12-18 16:24:26 -06:00