David Harris
|
8a96dcf0ae
|
Config cleanup and renamed BPRED_ENABLED to BPRED_SUPPORTED
|
2023-01-28 18:17:42 -08:00 |
|
David Harris
|
1041775be4
|
Removed DEISGN_COMPILER configuration paramter
|
2023-01-28 10:51:39 -08:00 |
|
David Harris
|
848ccd8b90
|
Fixed license header for config files to SolderPad
|
2023-01-27 15:17:17 -08:00 |
|
David Harris
|
e6f110b953
|
Replaced MDUE with IntDivE in FDIVSQRT
|
2023-01-11 11:06:37 -08:00 |
|
David Harris
|
080e8884db
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
|
2023-01-09 13:04:37 -08:00 |
|
David Harris
|
4f4b49886e
|
Changed DIVN from NF+3 to NF+2, cleanup
|
2023-01-09 13:04:34 -08:00 |
|
Ross Thompson
|
0a77d80224
|
Added folded gshare predictor with k=16 and depth=10.
|
2023-01-09 14:41:03 -06:00 |
|
Ross Thompson
|
685db5bb90
|
Fixed branch predictor.
|
2023-01-09 13:45:49 -06:00 |
|
Ross Thompson
|
e3df1d3326
|
Restored to default configuration.
|
2023-01-09 00:21:45 -06:00 |
|
Ross Thompson
|
f032eae7f5
|
Might have actually solved the gshare bug.
|
2023-01-09 00:11:25 -06:00 |
|
Ross Thompson
|
a35fb3addd
|
core part of global history works now. forwarding is still broken.
|
2023-01-08 23:35:02 -06:00 |
|
David Harris
|
31bffc305b
|
Removed unused UARCH configuration entries
|
2023-01-06 05:11:14 -08:00 |
|
Ross Thompson
|
e34f80db2f
|
More branch predictor cleanup.
|
2023-01-05 17:19:27 -06:00 |
|
Ross Thompson
|
010168a69e
|
Keep around the old gshare.
|
2023-01-05 15:55:46 -06:00 |
|
Ross Thompson
|
f3d871f2c3
|
Added speculative gshare.
|
2023-01-05 14:18:00 -06:00 |
|
Ross Thompson
|
3637067ace
|
Officially added global history with speculation to types of branch predictors.
|
2023-01-05 14:04:09 -06:00 |
|
Ross Thompson
|
87c9682311
|
Simplified gshare.
|
2023-01-04 23:51:09 -06:00 |
|
Ross Thompson
|
f8c656f1e0
|
Simiplified global history branch predictor.
|
2023-01-04 23:41:55 -06:00 |
|
Ross Thompson
|
31ec70029e
|
Re-enabled the branch predictor in rv64gc.
|
2022-12-29 17:07:50 -06:00 |
|
Cedar Turek
|
d41b07aa85
|
fpu idiv working on all configs with 1 copy of radix 2!
|
2022-12-26 23:18:28 -08:00 |
|
David Harris
|
71f214df20
|
Moved fdivsqrtexpcalc to its own file
|
2022-12-26 08:45:43 -08:00 |
|
David Harris
|
3bef12b108
|
Renamed DIV_BITSPERCYCLE to IDIV_BITSPERCYCLE
|
2022-12-15 08:23:34 -08:00 |
|
David Harris
|
e80e84aace
|
Added IDIV_ON_FPU flag to control whether integer division uses FPU
|
2022-12-15 06:37:55 -08:00 |
|
Ross Thompson
|
fa22484cfe
|
Reverted the IROM/DTIM address range modelsim assignment.
|
2022-11-30 17:13:33 -06:00 |
|
David Harris
|
2b241f8bbd
|
Set bit width of DMEM/IROM_SUPPORTED and fixed address decoding
|
2022-08-26 21:18:18 -07:00 |
|
David Harris
|
f0b4f69b65
|
Added IROM and DTIM decoding to adrdecs
|
2022-08-26 20:45:43 -07:00 |
|
David Harris
|
812158aeee
|
Replaced DTIM and IROM with DTIM_SUPPORTED, IROM_SUPPORTED, and base and range for each
|
2022-08-26 20:26:12 -07:00 |
|
David Harris
|
95dd50a567
|
Renamed DMEM to DTIM and added checks about compatibility of DTIM/IROM and virtmem
|
2022-08-26 20:12:03 -07:00 |
|
Ross Thompson
|
e605ef57dc
|
BROKEN. Don't use this commit.
Issue running cacheless with bus.
|
2022-08-25 11:02:46 -05:00 |
|
Ross Thompson
|
769af32f2a
|
Renamed RAM to UNCORE_RAM.
|
2022-08-24 18:09:07 -05:00 |
|
Ross Thompson
|
51adf6cba9
|
Modified the lsu/ifu memory configurations.
|
2022-08-24 12:35:15 -05:00 |
|
David Harris
|
e714b75888
|
LSU minor edits
|
2022-08-23 07:35:47 -07:00 |
|
Ross Thompson
|
69d520a7eb
|
Removed replay from the config files.
|
2022-07-24 00:34:11 -05:00 |
|
slmnemo
|
528869ef14
|
Removed references to initialization files
|
2022-06-23 16:50:27 -07:00 |
|
DTowersM
|
4e5d7ec3d6
|
changed DCACHE_LINELENINBITS and ICACHE_LINELENINBITS to 512, had to modigy the wfi test to increase timee before interupt to mantain compatability
|
2022-06-10 00:37:53 +00:00 |
|
slmnemo
|
35caa03e46
|
Updated Linux testbench to use new force/unforce method for Branch predictor init and removed related .txt files
|
2022-06-02 02:51:51 +00:00 |
|
slmnemo
|
ede0a3237d
|
quit
|
2022-05-17 01:03:09 +00:00 |
|
David Harris
|
8066ba45e8
|
Preliminary support for big endian modes. Regression passes but no big endian tests written yet.
|
2022-05-08 06:46:35 +00:00 |
|
Kip Macsai-Goren
|
3d1e1202f3
|
set WFI timeout to after 16 bits of counting for all configs
|
2022-04-28 18:14:08 +00:00 |
|
Shreya Sanghai
|
c3164f0ce1
|
added bpred size to wally config
|
2022-04-18 04:21:03 +00:00 |
|
David Harris
|
2436534687
|
First implementation of WFI timeout wait
|
2022-04-17 17:20:35 +00:00 |
|
Katherine Parry
|
20885f4dea
|
generating all testfloat vectors
|
2022-04-04 17:17:12 +00:00 |
|
Ross Thompson
|
e802deb4d6
|
Can now support the following memory and bus configurations.
1. dtim/irom only
2. bus only
3. dtim/irom + bus
4. caches + bus
|
2022-03-11 15:18:56 -06:00 |
|
bbracker
|
6caa97bb26
|
change UART PLIC IRQ mapping from 4 to 10 to match virt model; move WALLY-PERIPH tests to wally arch tests
|
2022-02-22 03:46:08 +00:00 |
|
Ross Thompson
|
6cd9d84e7f
|
New config option to enable hptw writes to PTE in memory to update Access and Dirty bits.
|
2022-02-17 17:19:41 -06:00 |
|
Ross Thompson
|
308cc34d6f
|
Added config to allow using the save/restore or replay implementation to handle sram clocked read delay.
|
2022-02-04 23:49:07 -06:00 |
|
David Harris
|
9e0055cbb9
|
More config file cleanup; 32ic tests broken
|
2022-02-03 01:08:34 +00:00 |
|
David Harris
|
bdf1a8ba73
|
changed DMEM and IMEM configurations to support BUS/TIM/CACHE
|
2022-02-03 00:41:09 +00:00 |
|
David Harris
|
172a02551b
|
Removed Busybear and Buildroot Configuration
|
2022-02-02 20:32:22 +00:00 |
|
David Harris
|
c6adb7b6b1
|
Updated configs to fix GPIO address to match FU540
|
2022-01-26 18:16:34 +00:00 |
|