Commit Graph

1615 Commits

Author SHA1 Message Date
Kevin Kim
441282f383 zbc initial done; passes lint.
clmul logic changes have not verified yet
2023-02-03 04:48:23 +00:00
Kevin Kim
34eb33a5e7 added bit reverse module, passes lint 2023-02-02 23:10:57 +00:00
Kevin Kim
1b6aca189d started zbc 2023-02-02 20:11:11 +00:00
Kevin Kim
d498d2b2ff zbs passes lint 2023-02-02 20:04:38 +00:00
Kevin Kim
c1ec17a7a6 clmul finished initial hdl; passes lint 2023-02-02 19:49:14 +00:00
Kevin Kim
655f5bbc5e continued clmul unit 2023-02-02 18:54:33 +00:00
Kevin Kim
bdd12bfec6 started clmul 2023-02-02 16:40:58 +00:00
Kip Macsai-Goren
0a6787026b Merge remote-tracking branch 'upstream/main' into main 2023-02-01 21:31:57 -08:00
Kip Macsai-Goren
26e8b85111 added beginning of a ZBS instruction module to the ALU. Control signals still needed 2023-02-01 21:31:25 -08:00
James Stine
6ce80b6b8a Update ram2 and other memories and associated wrappers 2023-02-01 17:03:48 -06:00
David Harris
0280942563 Fixed merge conflict to get synthesis working again 2023-02-01 04:43:57 -08:00
Madeleine Masser-Frye
ad6d7eb5e2 added memories (not tested) 2023-02-01 06:08:27 +00:00
David Harris
c666015c56 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-01-31 14:40:19 -08:00
Ross Thompson
81b280576f Updates to RAS. 2023-01-31 15:17:32 -06:00
Ross Thompson
fc2e3fed91 Simplified RAS. 2023-01-31 14:54:05 -06:00
Ross Thompson
a89f9dc92c RAS file name was spelled wrong. 2023-01-31 14:35:05 -06:00
Ross Thompson
026071e247 Merge branch 'imperas' 2023-01-31 12:46:22 -06:00
Ross Thompson
5a770f148c Minor bug fix in gshare. 2023-01-31 10:45:32 -06:00
Ross Thompson
ad0a0f0d51 Renamed signals in RAS. 2023-01-31 10:44:11 -06:00
Ross Thompson
0e3c77bed3 Found small bug in gshare. 2023-01-31 00:17:49 -06:00
Ross Thompson
8feac6d242 Parameterized testbench branch predictor preload. 2023-01-31 00:08:11 -06:00
Ross Thompson
238c4d14a9 More branch predictor cleanup. 2023-01-30 23:55:52 -06:00
Ross Thompson
80f50f10d3 Improved signal names. 2023-01-30 23:51:04 -06:00
Ross Thompson
a15889e0aa Major cleanup of branch predictor. 2023-01-30 23:37:34 -06:00
Ross Thompson
42828e6ec4 Simplified gshare. 2023-01-30 19:27:18 -06:00
Ross Thompson
4cbefd9834 Minor gshare optimization. 2023-01-30 18:13:12 -06:00
David Harris
1121ff0fa7 Restored top-level modules without import statements 2023-01-30 12:54:40 -08:00
David Harris
4a4be04530 Moved out version of wally using package because synthesis isn't working yet 2023-01-30 12:48:52 -08:00
David Harris
a2f66313ea Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-01-30 11:00:51 -08:00
Ross Thompson
cc48cdc97b Imperas found a real bug in virtual memory.
If the instruction address spilled across two pages and the second page misses the TLB,
the HPTW received a tlb miss at the address of the first page rather than the second.
After the walk the TLB was updated with the PTE from the first page at the address of the
second page.

Example bug
Instruction PCF = 0x2ffe
First page in 0x2ffe and second page in 0x3000.
The second page misses the TLB and generates HPTW request at 0x2ffe rather than 0x3000.
TLB is updated with PTE from 0x2ffe at 0x3000.
2023-01-30 11:47:51 -06:00
Ross Thompson
6040a45698 optimized branch predictor by removing unnecessary registers. 2023-01-29 22:39:37 -06:00
Ross Thompson
392716a608 Updated global history branch predictcor with the gshare improvements. 2023-01-29 16:26:44 -06:00
David Harris
234860d4e5 Merged PR#37 branch predictor 2023-01-29 14:25:28 -08:00
David Harris
9d44c59a38 Removed unused TESTSBP parameter 2023-01-29 14:19:24 -08:00
Ross Thompson
a9a7054e2f Merge branch 'main' of https://github.com/openhwgroup/cvw
This merges the branch predictor improvements into the main repo.
2023-01-29 15:24:20 -06:00
Ross Thompson
d6ae1156d0 gshare cleanup. 2023-01-29 15:07:45 -06:00
Ross Thompson
ef874f3409 Gshare cleanup. 2023-01-29 15:06:35 -06:00
Ross Thompson
74b4f78099 Found bug in gshare. 2023-01-29 15:03:25 -06:00
David Harris
d1afc2f14a Fixed configuration of ram to use macro when depth is corret 2023-01-29 11:35:17 -08:00
Ross Thompson
1044c290c2 Fixed bug with the btb's valid bit not beind held on a stall. 2023-01-29 00:49:23 -06:00
Ross Thompson
f93eaeef8e Fixed another bug with the speculative gshare with instruction class prediction. 2023-01-29 00:33:40 -06:00
David Harris
481cb8bad0 Renamed BPTYPE to BPRED_TYPE 2023-01-28 20:06:12 -08:00
David Harris
94daedeed6 Renamed DCACHE to DCACHE_SUPPORTED and ICACHE to ICACHE_SUPPORTED 2023-01-28 18:52:00 -08:00
David Harris
e4e7e827d6 Renamed BUS to BUS_SUPPORTED 2023-01-28 18:35:53 -08:00
David Harris
a0b4e7fb24 Config cleanup and renamed BPRED_ENABLED to BPRED_SUPPORTED 2023-01-28 18:17:42 -08:00
David Harris
33143e5958 Fixed typo in ram2p1r1wbe_1024x69 and renamed for consistency 2023-01-28 18:07:33 -08:00
David Harris
1bb1fc7604 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-01-28 17:55:08 -08:00
James Stine
a1d892703c Modified changes as follows
* Add docs directory for Docker including Dockerfile
* Change to synthesis script to include fpu stuff
* Add wrappers for IP (may need some cleanup but will cleanup shortly)
2023-01-28 19:33:00 -06:00
Ross Thompson
f6aafd6bad Fixed bug with the new csr. 2023-01-28 17:56:56 -06:00
Ross Thompson
6371d91b37 Added another performance counter to track overall branch miss-predictions. 2023-01-28 17:50:46 -06:00