64 Commits

Author	SHA1	Message	Date
Ross Thompson	976cd5a884	Added saif to synthDC flow.	2022-02-09 18:42:48 -06:00
Ross Thompson	c7a2e6cb06	Commented quit.	2022-02-09 16:44:26 -06:00
Ross Thompson	d1e79aaea5	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-02-09 16:11:31 -06:00
Ross Thompson	bb092a9dff	Added support for 90nm.	2022-02-09 16:06:27 -06:00
James E. Stine	216e050ecf	Add power analysis to synth.tcl	2022-02-09 16:04:20 -06:00
Ross Thompson	ed4e912413	Cleaned up synthesis flow.	2022-02-09 15:18:49 -06:00
Ross Thompson	04cf60a6bf	Updated synthesis and Makefile to output into binned directories.	2022-02-09 15:06:42 -06:00
David Harris	cb86e1cda9	Merged synthesiss scripts into main	2022-02-09 19:47:50 +00:00
James Stine	c1b3f5b655	Update synthesis script for overwrite during copy	2022-02-03 20:29:03 -06:00
David Harris	f9b1b47fc9	Synth for 500 MHz	2022-02-04 01:06:13 +00:00
David Harris	e80139cc91	Adjusted synthesis to compile rv32e on 12T library	2022-02-04 00:45:16 +00:00
David Harris	1c049f1f67	renamed configs	2022-02-03 23:36:41 +00:00
James Stine	6c9b4f648c	Change DC script to not do a full synthesis but partial synthesis until I configure to be more optimized	2022-01-30 21:02:41 -06:00
James Stine	1080281cb2	Add synthesis using DC shell back into repository	2022-01-30 17:34:56 -06:00