18 Commits

Author	SHA1	Message	Date
Jacob Pease	36d330a173	Masked lower byte when writing to DLL.	2024-07-24 22:44:27 -05:00
Jacob Pease	a97c7f0b58	Initialized UART with Arty frequency and baud rate. Will make this dynamic in the future	2024-07-24 22:43:47 -05:00
Jacob Pease	e175a41863	Added uart header to gpt.c.	2024-07-24 22:43:16 -05:00
Jacob Pease	23d9c7a486	Fixed syntax bugs. inline functions are now static and in the spi.h header.	2024-07-23 17:00:32 -05:00
Jacob Pease	692bbc35fd	Initial pass on SPI based bootloader code finished.	2024-07-23 16:33:49 -05:00
Jacob Pease	659f0d3646	Added some minor error checking to gpt.c.	2024-07-23 16:32:52 -05:00
Jacob Pease	fe0f6de2ab	Added sd_read64 to help with block reads and crc checking.	2024-07-23 16:32:29 -05:00
Jacob Pease	a95106b516	Progress made on implementing new disk read function.	2024-07-23 15:47:23 -05:00
Jacob Pease	db13ed63b9	Removed references to card_type.	2024-07-23 15:46:18 -05:00
Jacob Pease	188df61037	Added uart print functions and the Wally banner. SD card can now be initialized. Removed old code from boot.c	2024-07-23 14:18:42 -05:00
Jacob Pease	ef1f55626c	Added sd_cmd and utility SPI functions.	2024-07-22 16:57:04 -05:00
Jacob Pease	b6fac581f7	Corrected the CRC7 code with the right sequence of instructions.	2024-07-22 01:19:10 -05:00
Jacob Pease	cc32e90f66	Added inital spi based sd card code. Working on CRC7 code that works.	2024-07-20 14:00:43 -05:00
Jacob Pease	6018ab82ab	Added tentative spi_send_byte function.	2024-07-19 12:30:32 -05:00
Jacob Pease	5123a43ba2	Added initial spi code to fpga/zsbl	2024-07-19 11:35:12 -05:00
Jacob Pease	7a417d7a6c	Added true bootloader to fpga/zsbl directory.	2024-05-31 15:28:25 -05:00
Rose Thompson	6097444b5a	Added missing file for compiling the fpga zero stage bootloader.	2024-04-11 10:30:56 -05:00
Rose Thompson	60f96112db	Moved the zero stage boot loader to the fpga directory.	2024-03-01 10:23:55 -06:00