11 Commits

Author	SHA1	Message	Date
David Harris	5a8a82fe61	Commented out unnecessary text segment in test.ld that causes RWX in LOAD segment warning	2023-05-14 03:58:08 -07:00
David Harris	d353cef432	Removed unused ch5 assembly example	2022-05-12 14:05:27 +00:00
David Harris	b2c921ee7b	Added examples/asm/trap trap handler example	2022-05-12 04:31:00 +00:00
David Harris	2bc7399ad4	More example Makefile cleanup	2022-01-25 06:53:03 +00:00
David Harris	12e08d8055	Fixed sumtest reference output; added embench benchmark directory	2022-01-24 23:21:09 +00:00
David Harris	39d318fb2a	Fixed path to riscvOVPsimPlus	2022-01-21 00:12:14 +00:00
David Harris	7d13740a11	Mixed C and assembly language test cases; SRT initial version passing tests	2022-01-13 21:45:54 +00:00
David Harris	52a38c5856	Added performance counting to sumtest and added imperas32/64periph to testbench.	2021-12-29 00:28:51 +00:00
David Harris	48bb534658	Started FIR test code and started incorporating Imperas tests	2021-12-25 22:39:51 +00:00
David Harris	9b491788b2	Checked in Chapter 2 C and assembly examples	2021-12-25 06:35:36 -08:00
David Harris	0f319b45c1	Do File cleanups	2021-12-17 17:45:26 -08:00