11 Commits

Author	SHA1	Message	Date
Rose Thompson	1c54a5698b	Modified the device trees to include all the minor extensions.	2023-11-14 13:54:16 -06:00
Rose Thompson	6b7ff50a84	Reduced Arty A7 clock speed to 20Mhz to support Zicclsm.	2023-11-13 16:44:02 -06:00
Ross Thompson	3156d5abab	Somehow the arty A7 was missing the update for the console baud rate setting.	2023-10-03 17:37:13 -05:00
Ross Thompson	06efd2cdde	Pushed performance of arty a7 to 23Mhz.	2023-07-31 14:13:09 -05:00
Ross Thompson	dbf9e5da0b	Updated Arty A7 fpga config and device tree to 256MiB main memory.	2023-07-25 15:11:47 -05:00
Ross Thompson	e99c6e5e1d	Updated arty a7 device clock speed for 20Mhz.	2023-07-24 11:50:00 -05:00
Ross Thompson	49b87d4550	Merge branch 'main' of github.com:ross144/cvw	2023-07-24 10:47:05 -05:00
Ross Thompson	065e5e98c9	Improved timing constraints for arty a7 to push clock speed to 20Mhz.	2023-07-24 10:46:49 -05:00
Ross Thompson	481f27e3fe	Updated arty a7 device tree.	2023-07-21 19:08:45 -05:00
Ross Thompson	d04d2afed2	Modified the LSU/IFU and caches to improve critical path. Arty A7 went from 15 to 17Mhz. I believe we can push all the way to 20+Mhz with relatively little effort. Along the way I'm fixing up the scripts build the linux images for the flash card.	2023-07-21 13:06:27 -05:00
Ross Thompson	d1ea52f6ea	Added artya7 device tree.	2023-07-17 16:01:02 -05:00