20 Commits

Author	SHA1	Message	Date
David Harris	23868a33bc	Temporarily changed rv32e config to use TIM, but it still fails. Added rv32e tests.	2022-02-05 04:16:18 +00:00
David Harris	16b5fee795	RV32e tests	2022-02-04 14:30:36 +00:00
David Harris	e92461159d	cache cleanup	2022-02-03 15:36:11 +00:00
David Harris	9e0055cbb9	More config file cleanup; 32ic tests broken	2022-02-03 01:08:34 +00:00
David Harris	bdf1a8ba73	changed DMEM and IMEM configurations to support BUS/TIM/CACHE	2022-02-03 00:41:09 +00:00
Ross Thompson	2f7cf2bc7f	Fixed testbench so coremark stops.	2022-02-02 11:37:48 -06:00
Ross Thompson	ae36931bb2	Added correct stop condition for coremark.	2022-02-02 09:53:51 -06:00
Ross Thompson	138b17a399	Setup the main regression test to be able to handle coremark.	2022-02-01 17:00:11 -06:00
David Harris	62e5c7fd13	Comments in LSU code about restructuring	2022-01-27 15:53:59 +00:00
David Harris	ca1f7ce5d3	Renamed wallypipelinedhart to wallypipelinedcore	2022-01-20 16:02:08 +00:00
David Harris	5842d780a7	Defined rv32e and rv32emc configs	2022-01-17 14:01:01 +00:00
David Harris	f7f3882cb8	Moved Dcache into bus block	2022-01-15 00:39:07 +00:00
David Harris	37bf5347cf	LSU cleanup	2022-01-14 23:55:27 +00:00
Ross Thompson	9f7e3f147b	Partial local dtim in lsu configuration.	2022-01-13 17:50:31 -06:00
David Harris	453a794f86	Testbench directory cleanup	2022-01-07 17:02:16 +00:00
David Harris	3d2671a8b0	Reformatted MIT license to 95 characters	2022-01-07 12:58:40 +00:00
David Harris	d17a305538	Finished removing generate statements	2022-01-05 16:41:17 +00:00
Ross Thompson	888a60d8d6	Switched block for line in caches.	2022-01-04 22:08:18 -06:00
David Harris	9ddc6db0a6	Removed imperas mmu tests; using wallypriv instead	2022-01-04 23:14:53 +00:00
David Harris	115287adc8	Renamed wally-pipelined to pipelined	2022-01-04 19:47:41 +00:00