Commit Graph

4 Commits

Author SHA1 Message Date
Ross Thompson
51adf6cba9 Modified the lsu/ifu memory configurations. 2022-08-24 12:35:15 -05:00
Ross Thompson
e802deb4d6 Can now support the following memory and bus configurations.
1. dtim/irom only
2. bus only
3. dtim/irom + bus
4. caches + bus
2022-03-11 15:18:56 -06:00
David Harris
bdf1a8ba73 changed DMEM and IMEM configurations to support BUS/TIM/CACHE 2022-02-03 00:41:09 +00:00
David Harris
115287adc8 Renamed wally-pipelined to pipelined 2022-01-04 19:47:41 +00:00