10 Commits

Author	SHA1	Message	Date
Harshini Srinath	3593762cfa	Merge branch 'main' into main	2023-06-14 11:52:45 -07:00
Harshini Srinath	61d50a18da	Update csri.sv ... Program clean up	2023-06-12 19:32:04 -07:00
David Harris	b70b0c7c5e	Added support for menvcfg and senvcfg, including menvcfg.STCE for supervisor timer compare	2023-06-09 14:40:01 -07:00
Ross Thompson	c7e515634d	I think I've solved the slow down issue. Parameters can't be mixed with cvw_t and other types.	2023-05-26 13:56:51 -05:00
Ross Thompson	8cf38b28aa	The privileged unit is parameterized using Lim's method.	2023-05-26 12:03:46 -05:00
David Harris	da53f240d3	Refactored InstrValidNotFlushed into CSR Write signals	2023-03-30 17:06:09 -07:00
Ross Thompson	46b1bca4fc	Fixed all tap/space issue in RTL.	2023-03-24 17:32:25 -05:00
David Harris	4cde207958	Fix Issue #120 about SIE/SIP being 0 unless MIDELEG bits are set. However, this fix breaks the wally32/64priv tests in regression.	2023-03-18 10:10:58 -07:00
David Harris	5b370bdc0f	Added SSTC support for supervisor timer compare, but presently disable support. Reenable for rv32gc and rv64gc after tests pass.	2023-02-16 07:37:12 -08:00
David Harris	78eb90715c	Removed pipelined level of hierarchy	2023-02-02 14:14:11 -08:00