Limnanthes Serafini
034c289a36
Misc typo and indent fixing.
2023-04-13 16:54:15 -07:00
Alec Vercruysse
570e86afc3
Make CacheWay flush and dirty logic dependent on !READ_ONLY_CACHE
...
To increase coverage. Read-only caches do not have flushes since
they do not have dirty bits.
2023-04-05 11:48:18 -07:00
Alec Vercruysse
3419ef3651
remove ClearValid from cache
...
The cachefsm hardwired ClearValid logic to zero.
This signal might've been added to potentially add extra functionality
later. Unless that functionality is added, however, it negatively
impacts coverage. If the goal is to maximize coverage, this signal
should be removed and only added when it becomes necessary.
2023-04-05 11:48:18 -07:00
Alec Vercruysse
81125d3180
change i$ cachetagmem from ram1p1rwbe -> ram1p1rwe
...
the byte write-enables were always tied high, so we can use
RAM without byte-enable to increase coverage.
2023-04-05 11:48:18 -07:00
Alec Vercruysse
8b6b96012d
add ram1p1rwe for read-only cache ways (remove byte-enable)
...
- increases coverage
2023-04-05 11:48:18 -07:00
Alec Vercruysse
2553321158
fix typo in cachway setValid input comment
2023-04-05 11:48:18 -07:00
Ross Thompson
b5a58502d0
Replaced tabs -> spaces cache.
2023-03-24 15:15:38 -05:00
Ross Thompson
c190444fa2
Updated CAdr to CacheSet.
2023-03-13 14:53:00 -05:00
Ross Thompson
a5523400ae
Replaced DCACHE parameter with READ_ONLY_CACHE as the name was confusing in chapter 10.
2023-03-12 13:21:22 -05:00
David Harris
78eb90715c
Removed pipelined level of hierarchy
2023-02-02 14:14:11 -08:00
