12 Commits

Author	SHA1	Message	Date
Ross Thompson	2598f08782	Page table walker now walks the table. ... Added interlock so the icache stalls. Page table walker not walking correctly, goes to fault state.	2021-06-29 22:33:57 -05:00
Ross Thompson	d5063bee7d	Updated icache to abhlite to use pa_bits length and moved F/D stage instr register to ifu from icache.	2021-06-23 15:13:56 -05:00
Ross Thompson	03084a4128	Icache now uses physical lenght bits rather than XLEN.	2021-06-21 16:41:09 -05:00
Ross Thompson	8ec5b0c4f1	Improved some names in icache.	2021-06-21 16:40:37 -05:00
Ross Thompson	bb756849a7	Revert "Icache now uses physical lenght bits rather than XLEN." ... This reverts commit d4de8a54a2.	2021-06-19 08:58:34 -05:00
Ross Thompson	e4c932265d	Revert "Improved some names in icache." ... This reverts commit 22ea801edb.	2021-06-19 08:58:32 -05:00
Ross Thompson	22ea801edb	Improved some names in icache.	2021-06-18 12:22:41 -05:00
Ross Thompson	d4de8a54a2	Icache now uses physical lenght bits rather than XLEN.	2021-06-18 12:02:59 -05:00
David Harris	5e01f71c52	disabled Verilator WIDTH warnings in ICCacheCntrl	2021-06-12 19:50:06 -04:00
David Harris	e231fc6b00	More verilator fixes, but bpred is broken	2021-06-09 21:03:03 -04:00
Ross Thompson	e200b4b5a4	Continued I-Cache cleanup. ... Removed strange mux on InstrRawD along with the select logic.	2021-06-04 15:14:05 -05:00
Ross Thompson	2c16591396	Reorganized the icache names.	2021-06-04 12:53:42 -05:00