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Updated coremark to use wsim

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This commit is contained in:
David Harris 2024-04-06 21:38:44 -07:00
parent 76570ed2c2
commit fec160d6f9
4 changed files with 5 additions and 3 deletions
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2
addins/riscv-arch-test

@ -1 +1 @@
Subproject commit 8a52b016dbe1e2733cc168b9d6e5c93e39059d4d
Subproject commit 8a0cdceca9f0b91b81905eb8497f6586bf8d1c6b

3
benchmarks/coremark/Makefile
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@ -28,7 +28,8 @@ PORT_CFLAGS = -g -mabi=$(ABI) -march=$(ARCH) -static -falign-functions=16 \
all: $(work_dir)/coremark.bare.riscv.elf.memfile
run:
(cd ../../sim && (time vsim -c -do "do wally-batch.do rv$(XLEN)gc coremark" 2>&1 | tee $(work_dir)/coremark.sim.log))
time wsim rv$(XLEN)gc coremark 2>&1 | tee $(work_dir)/coremark.sim.log
#(cd ../../sim && (time vsim -c -do "do wally-batch.do rv$(XLEN)gc coremark" 2>&1 | tee $(work_dir)/coremark.sim.log))
$(work_dir)/coremark.bare.riscv.elf.memfile: $(work_dir)/coremark.bare.riscv
riscv64-unknown-elf-objdump -D $< > $<.elf.objdump

1
benchmarks/coremark/coremark_sweep.py
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@ -73,6 +73,7 @@ with open('coremark_results.csv', mode='w', newline='') as csvfile:
os.system(make_all)
make_run = f"make run XLEN={xlen_value} ARCH={arch}"
print("Running: " + make_run)
output = os.popen(make_run).read() # Capture the output of the command
# Extract the Coremark values using regular expressions

2
bin/regression-wally
View File

@ -306,7 +306,7 @@ if (testfloat):
tc = TestCase(
name=test,
variant=config,
cmd="wsim --tb testbench_fp --sim questa " + config + " " + test,
cmd="wsim --tb testbench_fp " + config + " " + test,
grepstr="All Tests completed with 0 errors")
configs.append(tc)